From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 496E7340298; Tue, 28 Apr 2026 05:26:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777353983; cv=none; b=XYHOOVckdidIC2s9mGHZ/wGlsQc3+9I11b7A5+F7G/J6UxaxxFTwgyvokDBpY9ZzGbOTf03WKRuWuQzzHJ8RsMxsCDWDf2MaVuC7hNqrfvCd+LIfKB+wU25Mdc+4sSgf4wUNM5CEFoa5SEUUiJmjbONy/IFwAsH1qIQ4bwLnHoc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777353983; c=relaxed/simple; bh=mFtLREm+SaZY/FTHpMbEdY3RBI86vnI8UH1AoXmvF2w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EIcqjTjgfQhCOxc3Fy3aTGrI2jtdUOCf9bMvqKzQwXHWIMhslCp3G7NwRKnnYAN+O2M3vXrIy/jh35vV///7hids0N7UG02R5HIRJx6F2ZYLIyQN3GNo68ObTT+qmBM3Uf/fNySG/8dvMml5QSrlOg+OyyxEkp3UhzXqfYRMDn0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=P2SxGLHj; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="P2SxGLHj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1777353982; x=1808889982; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mFtLREm+SaZY/FTHpMbEdY3RBI86vnI8UH1AoXmvF2w=; b=P2SxGLHjWTmCly/x2+mgnGVZvANMhMEkOUqiTOVdm9eIyM5AM/G018vu HxqWrTJQtNRmZG6MIbzeNGYfb21hHc7K5Ctsj0Y6Z7Cg23SbWg/j25jVa 0FbbfDoEGpvIMDl4vijVHcA96kOhT3s/nnfBj4oLpTlJ2Oo6Y14CzHhdF nDeQt+K1pLuBoYe1XmgZmPfn7J3nG5sVm3mKnO5nfUchD72KOdL2q4LZR l2hkPVeG23BlT5+XghHSxQoIciTG7qAnrzS/OF1vGAiygb6RXyscaSEAX 3/xXKsUUCwIc1f2sxQKQzhU+CeKr5BY6PMLwV+chx4uSwOS6NGiiY7YMn Q==; X-CSE-ConnectionGUID: pkcL4wEeSKSfewxDSPfoSA== X-CSE-MsgGUID: 5My+h8D4QfS9tF3XqRD14Q== X-IronPort-AV: E=McAfee;i="6800,10657,11769"; a="78131694" X-IronPort-AV: E=Sophos;i="6.23,203,1770624000"; d="scan'208";a="78131694" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2026 22:26:22 -0700 X-CSE-ConnectionGUID: SJ2RMudFQVK2PD6gv4bTIw== X-CSE-MsgGUID: aukh5skMRmKGUpMshubKYg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,203,1770624000"; d="scan'208";a="234130183" Received: from chang-linux-3.sc.intel.com (HELO chang-linux-3) ([172.25.66.106]) by orviesa007.jf.intel.com with ESMTP; 27 Apr 2026 22:26:21 -0700 From: "Chang S. Bae" To: pbonzini@redhat.com, seanjc@google.com Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, chao.gao@intel.com, chang.seok.bae@intel.com Subject: [PATCH v3 06/20] KVM: x86: Support APX state for XSAVE ABI Date: Tue, 28 Apr 2026 05:00:57 +0000 Message-ID: <20260428050111.39323-7-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260428050111.39323-1-chang.seok.bae@intel.com> References: <20260428050111.39323-1-chang.seok.bae@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce a facility to copy APX state between the VCPU cache and the userspace buffer since APX state is stored in the VCPU cache. The existing fpstate copy functions historically sync all XSTATEs in between userspace and kernel buffers [1]. In this regard, any additional state handling logic should be consistent with them -- i.e. validation of XSTATE_BV against the supported XCR0 mask. Now with the two copy paths, their invocations require to take care of ordering: * When exporting to userspace, the fpstate function should runs first since it zeros out the area of components either not present or inactive. Then the VCPU cache function ensures its state copy. * When importing from userspace, the VCPU cache function is better to run first. Clearing XSTATE_BV[APX] can help the fpstate function to skip the component. [1] Except for PKRU state, as stored in struct thread_struct. Signed-off-by: Chang S. Bae --- V2 -> V3: New patch Note: While avoiding #ifdefs in general, defining those helpers under CONFIG_KVM_APX seems to make it clear the most. But appreciate any suggestions if any better option. --- arch/x86/kvm/cpuid.c | 10 +++++++ arch/x86/kvm/cpuid.h | 2 ++ arch/x86/kvm/x86.c | 64 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 76 insertions(+) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index e69156b54cff..82cb7c8fbc07 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -59,6 +59,16 @@ void __init kvm_init_xstate_sizes(void) } } +u32 xstate_size(unsigned int xfeature) +{ + return xstate_sizes[xfeature].eax; +} + +u32 xstate_offset(unsigned int xfeature) +{ + return xstate_sizes[xfeature].ebx; +} + u32 xstate_required_size(u64 xstate_bv, bool compacted) { u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET; diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h index 039b8e6f40ba..5ace99dd152b 100644 --- a/arch/x86/kvm/cpuid.h +++ b/arch/x86/kvm/cpuid.h @@ -64,6 +64,8 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, void __init kvm_init_xstate_sizes(void); u32 xstate_required_size(u64 xstate_bv, bool compacted); +u32 xstate_size(unsigned int xfeature); +u32 xstate_offset(unsigned int xfeature); int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu); int cpuid_query_maxguestphyaddr(struct kvm_vcpu *vcpu); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index b8a91feec8e1..fb77869f0233 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -5804,10 +5804,58 @@ static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu, return 0; } +#ifdef CONFIG_KVM_APX +static void kvm_copy_vcpu_regs_to_uabi(struct kvm_vcpu *vcpu, void *buf, u64 supported_xcr0) +{ + union fpregs_state *xstate = (union fpregs_state *)buf; + + BUILD_BUG_ON(NR_VCPU_GENERAL_PURPOSE_REGS <= VCPU_REGS_R31); + + if (!(supported_xcr0 & XFEATURE_MASK_APX)) + return; + + memcpy(buf + xstate_offset(XFEATURE_APX), + &vcpu->arch.regs[VCPU_REGS_R16], + xstate_size(XFEATURE_APX)); + + xstate->xsave.header.xfeatures |= XFEATURE_MASK_APX; +} + +static int kvm_copy_uabi_to_vcpu_regs(struct kvm_vcpu *vcpu, void *buf, u64 supported_xcr0) +{ + union fpregs_state *xstate = (union fpregs_state *)buf; + + if (!(xstate->xsave.header.xfeatures & XFEATURE_MASK_APX)) + return 0; + + if (!(supported_xcr0 & XFEATURE_MASK_APX)) + return -EINVAL; + + BUILD_BUG_ON(NR_VCPU_GENERAL_PURPOSE_REGS <= VCPU_REGS_R31); + + memcpy(&vcpu->arch.regs[VCPU_REGS_R16], + buf + xstate_offset(XFEATURE_APX), + xstate_size(XFEATURE_APX)); + + /* + * APX off in XSTATE_BV will guide fpu_copy_uabi_to_guest_fpstate() + * to avoid from unnecessary handling. + */ + xstate->xsave.header.xfeatures &= ~XFEATURE_MASK_APX; + return 0; +} +#else +static void kvm_copy_vcpu_regs_to_uabi(struct kvm_vcpu *vcpu, void *buf, u64 supported_xcr0) { }; +static int kvm_copy_uabi_to_vcpu_regs(struct kvm_vcpu *vcpu, void *buf, u64 supported_xcr0) +{ + return 0; +} +#endif static int kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu, u8 *state, unsigned int size) { + /* * Only copy state for features that are enabled for the guest. The * state itself isn't problematic, but setting bits in the header for @@ -5826,8 +5874,15 @@ static int kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu, if (fpstate_is_confidential(&vcpu->arch.guest_fpu)) return vcpu->kvm->arch.has_protected_state ? -EINVAL : 0; + /* + * This copy function zeros out userspace memory for any gap from the + * guest fpstate. So invoke before copying any other state, i.e. APX, + * that is not saved in fpstate. + */ fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu, state, size, supported_xcr0, vcpu->arch.pkru); + kvm_copy_vcpu_regs_to_uabi(vcpu, state, supported_xcr0); + return 0; } @@ -5842,6 +5897,7 @@ static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu, struct kvm_xsave *guest_xsave) { union fpregs_state *xstate = (union fpregs_state *)guest_xsave->region; + int err; if (fpstate_is_confidential(&vcpu->arch.guest_fpu)) return vcpu->kvm->arch.has_protected_state ? -EINVAL : 0; @@ -5853,6 +5909,14 @@ static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu, */ xstate->xsave.header.xfeatures &= ~vcpu->arch.guest_fpu.fpstate->xfd; + /* + * Copy APX state to VCPU cache and mark off in XSTATE_BV first so that + * the following copy function do not save it in fpstate storage. + */ + err = kvm_copy_uabi_to_vcpu_regs(vcpu, guest_xsave->region, kvm_caps.supported_xcr0); + if (err) + return err; + return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu, guest_xsave->region, kvm_caps.supported_xcr0, -- 2.51.0