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Tue, 28 Apr 2026 13:07:17 +0000 (GMT) Received: from ltcd48-lp3.ltc.tadn.ibm.com (unknown [9.5.7.39]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 28 Apr 2026 13:07:17 +0000 (GMT) From: Narayana Murty N To: linuxppc-dev@lists.ozlabs.org, maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com Cc: christophe.leroy@csgroup.eu, linux-kernel@vger.kernel.org, nnmlinux@linux.ibm.com, mahesh@linux.ibm.com, vaibhav@linux.ibm.com, sbhat@linux.ibm.com Subject: [PATCH 1/1] powerpc/pseries/pci: quirks: Add pseries TG3 D3hot delay quirk for EEH stability Date: Tue, 28 Apr 2026 05:35:29 -0400 Message-ID: <20260428093529.7618-1-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.51.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-ORIG-GUID: JjcOzpQw7GYec8_6uW_jwYi9_NycNbR0 X-Authority-Analysis: v=2.4 cv=Ft81OWrq c=1 sm=1 tr=0 ts=69f0b10c cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=VnNF1IyMAAAA:8 a=aqhxxquPscKkPkbc_e4A:9 X-Proofpoint-GUID: FrrUsR-Y5D1ACdhaXo4TKElw8BYYDCfS X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI4MDExOCBTYWx0ZWRfX7OK290+s3wjC /SqUA9UQrQBSHlgoA9YPqHao6cr4pApyoMNAVueAIhN4ahzVwQl7/I4KqKNAX3f6FHSMP0KGPm/ yfljAZc+mF3nqWZKJ+pQa2seuXGJvrzdtDmg18hSUUOvJejhM+9CMJja05rRfL2wBiHxP7vIag5 /p6LcOKsrZgoo237AXvlR8QuVZawbei4FYPzCkRXvrw3K6MkkrRwY2ayl3Ks4C3POdMweEb8uSU cxOlkjaHnMjr91umKBtUNEtm5Y01K+PkJyeVNggGUFI4eNSBSGJpVImzZAE9BeVKFfRh8WRVj/r +XgJW/xfpszhSqaP0kCH8GPD1ARnFXMDQy91kmjQBhPR3n+p5D7Vc64NRahtRUvYPDdkRJgE9JI vATpHeF+VEryxW8IMX+Vi84pn1HTCZucCxuw2S6q9CI6dNNy+bFZ85EC8gqkqEpK+Y7AGl5CAoC c6sw1m/im8sJUCy3+mA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-28_04,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 spamscore=0 impostorscore=0 clxscore=1011 malwarescore=0 phishscore=0 suspectscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604280118 On pseries platforms, binding Broadcom PCIe NIC devices to the vfio-pci driver frequently triggers an unintended EEH (Extended Error Handling) isolation event. This occurs because the device firmware violates PCIe specification recovery timings when transitioning from the D3hot to D0 power state during the binding process. The strict pseries PHB catches the resulting Unsupported Request during the subsequent configuration space read, assuming a device failure. Add a pseries-specific PCI fixup quirk for Broadcom devices to explicitly extend the `d3hot_delay` to 200ms. This forces the PCI core to sleep long enough for the firmware to safely complete the D0 transition before attempting config reads, ensuring a clean VFIO passthrough initialization. Signed-off-by: Narayana Murty N --- arch/powerpc/platforms/pseries/pci.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c index 84e4ffe957a8..5f3cf9a7bdd3 100644 --- a/arch/powerpc/platforms/pseries/pci.c +++ b/arch/powerpc/platforms/pseries/pci.c @@ -291,3 +291,24 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) bus->cur_bus_speed = prop_to_pci_speed(pcie_link_speed_stats[1]); return 0; } + +/* + * Workaround for sluggish PCIe device firmware. + * + * The device violates the PCIe spec recovery timing when transitioning + * from D3hot to D0. On standard architectures this is often ignored, but + * the strict PowerPC pseries PHB catches the Unsupported Request during + * the subsequent config read and triggers an EEH. + * + * We inject a longer delay to ensure the device is ready before the PCI + * core attempts to access configuration space. + */ +static void quirk_pseries_d0_wake_delay(struct pci_dev *dev) +{ + dev->d3hot_delay = 200; + pci_info(dev, "pseries Quirk:D3hot->D0 delay %d ms to prevent EEH\n", + dev->d3hot_delay); +} +/* Blanket application to ALL Broadcom PCI devices */ +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, + PCI_ANY_ID, quirk_pseries_d0_wake_delay); -- 2.51.1