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Tue, 28 Apr 2026 23:11:30 -0700 From: Ashish Mhetre To: , , CC: , , , Ashish Mhetre Subject: [PATCH] memory: tegra: Wire up system sleep PM ops Date: Wed, 29 Apr 2026 06:11:22 +0000 Message-ID: <20260429061122.807346-1-amhetre@nvidia.com> X-Mailer: git-send-email 2.50.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CDD:EE_|CY3PR12MB9554:EE_ X-MS-Office365-Filtering-Correlation-Id: 7fd09dc6-a60c-4df8-4761-08dea5b6314d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|1800799024|56012099003|18002099003; X-Microsoft-Antispam-Message-Info: BaGNyuQ2K5jv84CLw0vv+dL5ShjqLseOlMj2+MJU0twVFkDnWx5LdBFlpP5N7R+g3n3hGG9cnc0NgpN2v4vnZrWCAXviIw/X93JGdYk1iNLj4YsUhAm60MTXwYITPY21VNZ+DkpqcQBTA+abuiXHvOIDlL01nSqxkwjWFhtJNZsMLtq5SSVF1IJEjMGCFSEKj0feDhXSxK60h6bxee1UUZJlkrUDJzmFnGIxCv+7CSCjClC7krO2mJWi4yeai13slY9a1/xVzLj+tI9NGI3E+/lXQeGSM132LeJncKiUfbnIDrGHV6pzfdQJIIkPYoJMClOiEj4hePT/fEO08nnbICLLiLNSIsMcxIdvrKGcpKwGxJO4zzIn7jm4REboyh4L9GiHvzs+AnT4ZYx5mjCGl0ZZGB9+O8jFqglWGA2v/fjBr1sw0OwDjLw8nGHcoCr/UAohFQpP/VM453wID6gakkoXi5ySo4qBilsCxi6YvVgKHdW4ghM1PN20Fzbb5H5TZvt4KiKwCNmZmksjWPHicjIdrDNspicrWDB3FfwrdsXJ/+d2QINZWLhwHFUxqVyPaFkTrWwf6yX1DmkUVa2k8tQnl4NTm3xpPzg/YmidrF4GPBb0P/kZe6MMaEWGzCgJ5s2PAp7u5y+RRDQxRxm8fCvAL80Ef2JWZ52WXBzOp3CP3vjDIoQ84m7UtbMc2yCztm1hsSdCj802493ZVMzuCZASyKQoVZyZhVUJ72wdJefEYGdnJHXewmE3CTMhy/x4bH8PZ2LIFDobpXe5R3eyUg== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700016)(1800799024)(56012099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: qOCKMl8O+3ufmTspmopFpwvglJ18YM1NwyZH692HX2WLIlRhTJyD8ZNfQXQ0x7KKW0QJLem+GLL8fj59i1z9cC4Gvm+2yPeKIf4bZnxzlT2Z5/z/X1ezF5yOZRfvXI0OQJcmOmEztJpNX70RBjRya+0+V0PIWgv4LTmizEMlTa+M26gSstKo2j5yZQ5Rw+fhxlXy7K3IwQFGvuSub2+icROEqJ1wnsHTB5djBJApCG+aXoULZs2gMkTINBHTAZ6qO4sgoivkPQB0b2mc/vnkGjBJnbQ1EiJdjImNWQlb4uQSyXXCq5703FRfOTMECO+O/grDBtkg0aMXIOSsiJRAh15Twx12XczAVYEHgXwJ75fqx9eUVjQftk83cmRYslIOYmnbFRivvcDipMohynpeb6e2DZrsoWYwqiI/sa9F9OWramUpO4deasS9iHnhBu9J X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Apr 2026 06:11:46.2586 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7fd09dc6-a60c-4df8-4761-08dea5b6314d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CDD.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY3PR12MB9554 The tegra-mc platform driver does not register any dev_pm_ops, so the the SoC-specific ->resume() is never invoked (e.g. tegra186_mc_resume) on system wake. On Tegra186 and later this means MC client Stream-ID override registers are not reprogrammed. Register a dev_pm_ops on the tegra-mc driver and route the system resume callback into mc->soc->ops->resume() so the existing SID restore path runs again on wake. The MC interrupt mask registers also lose state across SC7, so re-apply them on resume. Factor the existing intmask programming out of tegra_mc_probe() into tegra_mc_setup_intmask() and reuse it from both probe and resume to avoid duplicating the loop. No suspend callback is needed as the resume path reprograms all MC state from the static SoC tables, so there is nothing to save. Signed-off-by: Ashish Mhetre --- drivers/memory/tegra/mc.c | 46 +++++++++++++++++++++++++++++++++------ 1 file changed, 39 insertions(+), 7 deletions(-) diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index d620660da331..cddcefdd16c5 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -910,6 +911,19 @@ static void tegra_mc_num_channel_enabled(struct tegra_mc *mc) } } +static void tegra_mc_setup_intmask(struct tegra_mc *mc) +{ + unsigned int i; + + for (i = 0; i < mc->soc->num_intmasks; i++) { + if (mc->soc->num_channels) + mc_ch_writel(mc, MC_BROADCAST_CHANNEL, mc->soc->intmasks[i].mask, + mc->soc->intmasks[i].reg); + else + mc_writel(mc, mc->soc->intmasks[i].mask, mc->soc->intmasks[i].reg); + } +} + static int tegra_mc_probe(struct platform_device *pdev) { struct tegra_mc *mc; @@ -970,13 +984,7 @@ static int tegra_mc_probe(struct platform_device *pdev) } } - for (i = 0; i < mc->soc->num_intmasks; i++) { - if (mc->soc->num_channels) - mc_ch_writel(mc, MC_BROADCAST_CHANNEL, mc->soc->intmasks[i].mask, - mc->soc->intmasks[i].reg); - else - mc_writel(mc, mc->soc->intmasks[i].mask, mc->soc->intmasks[i].reg); - } + tegra_mc_setup_intmask(mc); } if (mc->soc->reset_ops) { @@ -1010,10 +1018,34 @@ static void tegra_mc_sync_state(struct device *dev) icc_sync_state(dev); } +static int tegra_mc_resume(struct device *dev) +{ + struct tegra_mc *mc = dev_get_drvdata(dev); + int err; + + if (mc->soc->ops && mc->soc->ops->resume) { + err = mc->soc->ops->resume(mc); + if (err) + return err; + } + + tegra_mc_setup_intmask(mc); + + return 0; +} + +/* + * No suspend callback is needed because the resume path reinitializes all + * necessary MC register state (SID overrides, interrupt masks) from static + * SoC data tables rather than from saved runtime state. + */ +static DEFINE_SIMPLE_DEV_PM_OPS(tegra_mc_pm_ops, NULL, tegra_mc_resume); + static struct platform_driver tegra_mc_driver = { .driver = { .name = "tegra-mc", .of_match_table = tegra_mc_of_match, + .pm = pm_sleep_ptr(&tegra_mc_pm_ops), .suppress_bind_attrs = true, .sync_state = tegra_mc_sync_state, }, -- 2.50.1