From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16139413241 for ; Wed, 29 Apr 2026 18:33:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777487608; cv=pass; b=Xj5c9Rl0OvEFeieiePSpeAeShFdWenS00unSqhnlG8SV78ei7oyqLLjP9lIe3EakjBtydS5DmpOytN2yDKUIDiy/MXdd7a+G6qvudbUmv96dNNpvtLB2npFBDsEi4r80qesT4wkaeV5PNTr57VhmFqGaStVzP/V+YF142jrGKvE= ARC-Message-Signature:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777487608; c=relaxed/simple; bh=3YAMIS4FUapbjt/AjxXz37J8XtdAOhbo3GyXODAk2ns=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=RlHtrGED8crJO7GpUIOgvjcV+5bsTzZ+3QeSI6CVOAefEjF5QqCsv/Ra0pspoceEy7dc7O3VLqioyBQYJDYveWyhbu4K6oCxMaFTOlo6dRm7Ejnduji6qva9zYmS0VqK6BevqqYiMN21++9KgjWF9b4VfWJV9Xud9w/Ph1mSC7U= ARC-Authentication-Results:i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=HtASK0DP; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="HtASK0DP" ARC-Seal: i=1; a=rsa-sha256; t=1777487587; cv=none; d=zohomail.com; s=zohoarc; b=W1gIHGQrpdFGLhvHTdztKdXkpnajz6/Y+pXLIi0pOGnaRtn0Gepq1WCIMmkO/Xq/8puiZcSnUTtp2DQjyWiEQIo1mB6+pMFP5Cmay8SGreBhvZsCXCmQnJmFu3VzI2V0quvdRjfqGSEnWCkk2p71tVGFKoSpp9qGY2tJvHTv224= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1777487587; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=Yn+lNA4MFHmNERMplaWuzXxuMrhoQvQYCwIda7hIGOQ=; b=Q9rJpgA8otjzWsjOJRMwtdurMNxReHPNKQI7mYIOKoUWkhXcH+fMqxFdgTdwl3Bzbi6n7l7zbbCWnkBAGrqWVwDfQmkn8Z327dB/4YKBGk1SOdqX/hHo7TSm4v8FoaVTjVEkPie7LWtbZ5ILU4Sm3DgL+p74QGzNjT0ewFgsxxI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1777487587; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=Yn+lNA4MFHmNERMplaWuzXxuMrhoQvQYCwIda7hIGOQ=; b=HtASK0DPXqTe1t+vwsRQ8Ak1r7546qT4f+aLb8ZDBx/VHqg0yQWyNxyEB1u+/fVT 2lOYMLcj8RLkGnUHgCqTwKcXOGPNcRUi6Smp72zTc1GPiP5w3eoTXC9O1j6B/pBe9fq dXjYW3b6kj98sklXQ621v04qUkxYpad7ErQ493EM= Received: by mx.zohomail.com with SMTPS id 1777487585986469.19315343245125; Wed, 29 Apr 2026 11:33:05 -0700 (PDT) From: =?UTF-8?q?Adri=C3=A1n=20Larumbe?= To: linux-kernel@vger.kernel.org Cc: dri-devel@lists.freedesktop.org, Steven Price , Boris Brezillon , kernel@collabora.com, =?UTF-8?q?Adri=C3=A1n=20Larumbe?= , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Daniel Almeida , Alice Ryhl Subject: [PATCH v10 1/6] drm/panthor: Expose GPU page sizes to UM Date: Wed, 29 Apr 2026 19:32:13 +0100 Message-ID: <20260429183253.66422-2-adrian.larumbe@collabora.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260429183253.66422-1-adrian.larumbe@collabora.com> References: <20260429183253.66422-1-adrian.larumbe@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In future commits that will implement repeated mappings, only repeat values multiple of GPU page sizes will be tolerated. That means these values must be made known to UM. Do it through a queriable GPU info value. Reviewed-by: Steven Price Reviewed-by: Boris Brezillon Signed-off-by: Adrián Larumbe --- drivers/gpu/drm/panthor/panthor_device.h | 3 +++ drivers/gpu/drm/panthor/panthor_drv.c | 8 ++++++++ drivers/gpu/drm/panthor/panthor_mmu.c | 9 ++++++++- include/uapi/drm/panthor_drm.h | 13 +++++++++++++ 4 files changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h index 5cba272f9b4d..d856a4fe1d61 100644 --- a/drivers/gpu/drm/panthor/panthor_device.h +++ b/drivers/gpu/drm/panthor/panthor_device.h @@ -158,6 +158,9 @@ struct panthor_device { /** @csif_info: Command stream interface information. */ struct drm_panthor_csif_info csif_info; + /** @mmu_info: MMU info */ + struct drm_panthor_mmu_info mmu_info; + /** @hw: GPU-specific data. */ struct panthor_hw *hw; diff --git a/drivers/gpu/drm/panthor/panthor_drv.c b/drivers/gpu/drm/panthor/panthor_drv.c index 73fc983dc9b4..beca75b34293 100644 --- a/drivers/gpu/drm/panthor/panthor_drv.c +++ b/drivers/gpu/drm/panthor/panthor_drv.c @@ -175,6 +175,7 @@ panthor_get_uobj_array(const struct drm_panthor_obj_array *in, u32 min_stride, _Generic(_obj_name, \ PANTHOR_UOBJ_DECL(struct drm_panthor_gpu_info, tiler_present), \ PANTHOR_UOBJ_DECL(struct drm_panthor_csif_info, pad), \ + PANTHOR_UOBJ_DECL(struct drm_panthor_mmu_info, page_size_bitmap), \ PANTHOR_UOBJ_DECL(struct drm_panthor_timestamp_info, current_timestamp), \ PANTHOR_UOBJ_DECL(struct drm_panthor_group_priorities_info, pad), \ PANTHOR_UOBJ_DECL(struct drm_panthor_sync_op, timeline_value), \ @@ -954,6 +955,10 @@ static int panthor_ioctl_dev_query(struct drm_device *ddev, void *data, struct d args->size = sizeof(priorities_info); return 0; + case DRM_PANTHOR_DEV_QUERY_MMU_INFO: + args->size = sizeof(ptdev->mmu_info); + return 0; + default: return -EINVAL; } @@ -984,6 +989,9 @@ static int panthor_ioctl_dev_query(struct drm_device *ddev, void *data, struct d panthor_query_group_priorities_info(file, &priorities_info); return PANTHOR_UOBJ_SET(args->pointer, args->size, priorities_info); + case DRM_PANTHOR_DEV_QUERY_MMU_INFO: + return PANTHOR_UOBJ_SET(args->pointer, args->size, ptdev->mmu_info); + default: return -EINVAL; } diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c index fc930ee158a5..9b526b61d96d 100644 --- a/drivers/gpu/drm/panthor/panthor_mmu.c +++ b/drivers/gpu/drm/panthor/panthor_mmu.c @@ -2768,7 +2768,7 @@ panthor_vm_create(struct panthor_device *ptdev, bool for_mcu, refcount_set(&vm->as.active_cnt, 0); pgtbl_cfg = (struct io_pgtable_cfg) { - .pgsize_bitmap = SZ_4K | SZ_2M, + .pgsize_bitmap = ptdev->mmu_info.page_size_bitmap, .ias = va_bits, .oas = pa_bits, .coherent_walk = ptdev->coherent, @@ -3213,6 +3213,11 @@ static void panthor_mmu_release_wq(struct drm_device *ddev, void *res) destroy_workqueue(res); } +static void panthor_mmu_info_init(struct panthor_device *ptdev) +{ + ptdev->mmu_info.page_size_bitmap = SZ_4K | SZ_2M; +} + /** * panthor_mmu_init() - Initialize the MMU logic. * @ptdev: Device. @@ -3225,6 +3230,8 @@ int panthor_mmu_init(struct panthor_device *ptdev) struct panthor_mmu *mmu; int ret, irq; + panthor_mmu_info_init(ptdev); + mmu = drmm_kzalloc(&ptdev->base, sizeof(*mmu), GFP_KERNEL); if (!mmu) return -ENOMEM; diff --git a/include/uapi/drm/panthor_drm.h b/include/uapi/drm/panthor_drm.h index 0e455d91e77d..b462752c793d 100644 --- a/include/uapi/drm/panthor_drm.h +++ b/include/uapi/drm/panthor_drm.h @@ -253,6 +253,9 @@ enum drm_panthor_dev_query_type { * @DRM_PANTHOR_DEV_QUERY_GROUP_PRIORITIES_INFO: Query allowed group priorities information. */ DRM_PANTHOR_DEV_QUERY_GROUP_PRIORITIES_INFO, + + /** @DRM_PANTHOR_DEV_QUERY_MMU_INFO: Query MMU information. */ + DRM_PANTHOR_DEV_QUERY_MMU_INFO, }; /** @@ -487,6 +490,16 @@ struct drm_panthor_timestamp_info { __u64 cpu_timestamp_nsec; }; +/** + * struct drm_panthor_mmu_info - MMU information + * + * Structure grouping all queryable information relating to the MMU. + */ +struct drm_panthor_mmu_info { + /** @page_size_bitmap: Allowed page sizes */ + __u64 page_size_bitmap; +}; + /** * struct drm_panthor_group_priorities_info - Group priorities information * -- 2.53.0