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From: Bjorn Helgaas <helgaas@kernel.org>
To: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] pci: quirks: Advertise D3cold capability for UPD720201
Date: Thu, 30 Apr 2026 16:14:43 -0500	[thread overview]
Message-ID: <20260430211443.GA440215@bhelgaas> (raw)
In-Reply-To: <20260430-d3cold_support-v1-1-6734f280c481@oss.qualcomm.com>

On Thu, Apr 30, 2026 at 10:12:18AM +0530, Sushrut Shree Trivedi wrote:
> PCIe-to-USB bridge UPD720201 does not advertise D3cold
> support until firmware is loaded post pci enumeration.
> This results in upd blocking D3cold entry during system
> suspend and causing overall failure to enter XO
> shutdown.

I think you're saying that the PM Capability in config space changes
when the firmware is loaded.  That makes me worry about what *other*
config space changes might happen when the firmware is loaded.
There's all sorts of stuff we do during enumeration that depends on
what's in config space.

> Hence, add a quirk to advertise D3cold PME capability
> since the HW actually supports and advertises it post
> firmware loading.
> 
> Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
> ---
>  drivers/pci/quirks.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index caaed1a01dc0..c32617ed33aa 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -6381,3 +6381,13 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)
>  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_timeout);
>  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_timeout);
>  #endif
> +
> +/*
> + * Renesas PCIe-to-USB bridge UPD720201 does not advertise D3cold
> + * capability by default until firmware is loaded post-enumeration.

There are several mentions of "Renesas UPD720201/UPD720202 USB 3.0
xHCI Host Controller" in the tree.  I assume this is the same device?
If so, I think it'd be worth using similar terminology, i.e., "USB
xHCI host controller" instead of "PCIe-to-USB bridge"

> +static void quirk_enable_d3cold(struct pci_dev *dev)
> +{
> +	dev->pme_support = dev->pme_support | (1 << PCI_D3cold);
> +}
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RENESAS, 0x0014, quirk_enable_d3cold);

How do we know that FINAL fixups happen after firmware loading?

      reply	other threads:[~2026-04-30 21:14 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-30  4:42 [PATCH] pci: quirks: Advertise D3cold capability for UPD720201 Sushrut Shree Trivedi
2026-04-30 21:14 ` Bjorn Helgaas [this message]

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