[PATCH v6 16/25] iommu/arm-smmu-v3-kvm: Add CMDQ functions

Mostafa Saleh
2026-05-01T11:20:23Z

Add functions to access the command queue, there are 2 main usage:
- Hypervisor's own commands, as TLB invalidation, would use functions
as smmu_send_cmd(), which creates and sends a command.
- Add host commands to the shadow command queue, after being filtered,
these will be added with smmu_add_cmd_raw.

Signed-off-by: Mostafa Saleh <smostafa@google.com>
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 14 ++-
.../iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c | 107 ++++++++++++++++++
2 files changed, 115 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index f904f4d19609..3fc499608d76 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -1156,19 +1156,21 @@ u32 smmu_idr5_to_oas(u32 reg);
unsigned long smmu_idr5_to_pgsize(u32 reg);

/* Queue functions shared between kernel and hyp. */
-static inline bool queue_has_space(struct arm_smmu_ll_queue *q, u32 n)
+static inline u32 queue_space(struct arm_smmu_ll_queue *q)
{
- u32 space, prod, cons;
+ u32 prod, cons;

prod = Q_IDX(q, q->prod);
cons = Q_IDX(q, q->cons);

if (Q_WRP(q, q->prod) == Q_WRP(q, q->cons))
- space = (1 << q->max_n_shift) - (prod - cons);
- else
- space = cons - prod;
+ return (1 << q->max_n_shift) - (prod - cons);
+ return cons - prod;
+}

- return space >= n;
+static inline bool queue_has_space(struct arm_smmu_ll_queue *q, u32 n)
+{
+ return queue_space(q) >= n;
}

static inline bool queue_full(struct arm_smmu_ll_queue *q)
diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
index 3b77796dafc7..aac455599728 100644
--- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
@@ -6,6 +6,7 @@
*/
#include <asm/kvm_hyp.h>

+#include <nvhe/clock.h>
#include <nvhe/iommu.h>
#include <nvhe/mem_protect.h>
#include <nvhe/trap_handler.h>
@@ -22,6 +23,31 @@ struct hyp_arm_smmu_v3_device *kvm_hyp_arm_smmu_v3_smmus;

#define cmdq_size(cmdq) ((1 << ((cmdq)->llq.max_n_shift)) * CMDQ_ENT_DWORDS * 8)

+/*
+ * Wait until @cond is true.
+ * Return 0 on success, or -ETIMEDOUT
+ */
+#define smmu_wait(use_wfe, _cond) \
+({ \
+ int __ret = 0; \
+ u64 delay = hyp_clock_ns() + ARM_SMMU_POLL_TIMEOUT_US * 1000; \
+ \
+ while (!(_cond)) { \
+ if (use_wfe) { \
+ wfe(); \
+ if ((_cond)) \
+ break; \
+ } else { \
+ cpu_relax(); \
+ } \
+ if (hyp_clock_ns() >= delay) { \
+ __ret = -ETIMEDOUT; \
+ break; \
+ } \
+ } \
+ __ret; \
+})
+
static bool is_cmdq_enabled(struct hyp_arm_smmu_v3_device *smmu)
{
return FIELD_GET(CR0_CMDQEN, smmu->cr0);
@@ -74,6 +100,87 @@ static int smmu_unshare_pages(phys_addr_t addr, size_t size)
return 0;
}

+__maybe_unused
+static bool smmu_cmdq_has_space(struct arm_smmu_queue *cmdq, u32 n)
+{
+ struct arm_smmu_ll_queue *llq = &cmdq->llq;
+
+ WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg));
+ return queue_has_space(llq, n);
+}
+
+static bool smmu_cmdq_full(struct arm_smmu_queue *cmdq)
+{
+ struct arm_smmu_ll_queue *llq = &cmdq->llq;
+
+ WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg));
+ return queue_full(llq);
+}
+
+static bool smmu_cmdq_empty(struct arm_smmu_queue *cmdq)
+{
+ struct arm_smmu_ll_queue *llq = &cmdq->llq;
+
+ WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg));
+ return queue_empty(llq);
+}
+
+static void smmu_add_cmd_raw(struct hyp_arm_smmu_v3_device *smmu,
+ u64 *cmd)
+{
+ struct arm_smmu_queue *q = &smmu->cmdq;
+ struct arm_smmu_ll_queue *llq = &q->llq;
+
+ queue_write(Q_ENT(q, llq->prod), cmd, CMDQ_ENT_DWORDS);
+ llq->prod = queue_inc_prod_n(llq, 1);
+}
+
+static int smmu_add_cmd(struct hyp_arm_smmu_v3_device *smmu,
+ struct arm_smmu_cmdq_ent *ent)
+{
+ int ret;
+ u64 cmd[CMDQ_ENT_DWORDS];
+
+ ret = smmu_wait(false, !smmu_cmdq_full(&smmu->cmdq));
+ if (ret)
+ return ret;
+
+ ret = arm_smmu_cmdq_build_cmd(cmd, ent);
+ if (ret)
+ return ret;
+
+ smmu_add_cmd_raw(smmu, cmd);
+ writel(smmu->cmdq.llq.prod, smmu->cmdq.prod_reg);
+ return 0;
+}
+
+static int smmu_sync_cmd(struct hyp_arm_smmu_v3_device *smmu)
+{
+ int ret;
+ struct arm_smmu_cmdq_ent cmd = {
+ .opcode = CMDQ_OP_CMD_SYNC,
+ };
+
+ ret = smmu_add_cmd(smmu, &cmd);
+ if (ret)
+ return ret;
+
+ return smmu_wait(smmu->features & ARM_SMMU_FEAT_SEV,
+ smmu_cmdq_empty(&smmu->cmdq));
+}
+
+__maybe_unused
+static int smmu_send_cmd(struct hyp_arm_smmu_v3_device *smmu,
+ struct arm_smmu_cmdq_ent *cmd)
+{
+ int ret = smmu_add_cmd(smmu, cmd);
+
+ if (ret)
+ return ret;
+
+ return smmu_sync_cmd(smmu);
+}
+
/* Put the device in a state that can be probed by the host driver. */
static void smmu_deinit_device(struct hyp_arm_smmu_v3_device *smmu)
{
--
2.54.0.545.g6539524ca2-goog