[PATCH v6 13/25] iommu/arm-smmu-v3-kvm: Probe SMMU HW

Mostafa Saleh
2026-05-01T11:20:18Z

Probe SMMU features from the IDR register space, most of
the logic is common with the kernel.

Signed-off-by: Mostafa Saleh <smostafa@google.com>
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 --
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 6 ++
.../iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c | 78 +++++++++++++++++++
.../iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h | 6 ++
4 files changed, 90 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 61e6ab364086..157acde0436d 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -4738,12 +4738,6 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu)
return 0;
}

-#define IIDR_IMPLEMENTER_ARM 0x43b
-#define IIDR_PRODUCTID_ARM_MMU_600 0x483
-#define IIDR_PRODUCTID_ARM_MMU_700 0x487
-#define IIDR_PRODUCTID_ARM_MMU_L1 0x48a
-#define IIDR_PRODUCTID_ARM_MMU_S3 0x498
-
static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu)
{
u32 reg;
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index 64618299d03a..f904f4d19609 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -84,6 +84,12 @@ struct arm_vsmmu;
#define IIDR_REVISION GENMASK(15, 12)
#define IIDR_IMPLEMENTER GENMASK(11, 0)

+#define IIDR_IMPLEMENTER_ARM 0x43b
+#define IIDR_PRODUCTID_ARM_MMU_600 0x483
+#define IIDR_PRODUCTID_ARM_MMU_700 0x487
+#define IIDR_PRODUCTID_ARM_MMU_L1 0x48a
+#define IIDR_PRODUCTID_ARM_MMU_S3 0x498
+
#define ARM_SMMU_AIDR 0x1C

#define ARM_SMMU_CR0 0x20
diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
index 9afc314d0acc..d9945db9e102 100644
--- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
@@ -10,6 +10,7 @@
#include <nvhe/mem_protect.h>

#include "arm_smmu_v3.h"
+#include "../arm-smmu-v3.h"

size_t __ro_after_init kvm_hyp_arm_smmu_v3_count;
struct hyp_arm_smmu_v3_device *kvm_hyp_arm_smmu_v3_smmus;
@@ -26,6 +27,77 @@ static void smmu_deinit_device(struct hyp_arm_smmu_v3_device *smmu)
smmu->base = NULL;
}

+static bool smmu_nesting_supported(struct hyp_arm_smmu_v3_device *smmu)
+{
+ unsigned int implementer, productid, variant, revision;
+ u32 reg;
+
+ if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1) ||
+ !(smmu->features & ARM_SMMU_FEAT_TRANS_S2))
+ return false;
+
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IIDR);
+ implementer = FIELD_GET(IIDR_IMPLEMENTER, reg);
+ productid = FIELD_GET(IIDR_PRODUCTID, reg);
+ variant = FIELD_GET(IIDR_VARIANT, reg);
+ revision = FIELD_GET(IIDR_REVISION, reg);
+
+ if (implementer != IIDR_IMPLEMENTER_ARM)
+ return true;
+
+ if (productid == IIDR_PRODUCTID_ARM_MMU_600)
+ return variant >= 2;
+ else if (productid == IIDR_PRODUCTID_ARM_MMU_700)
+ return !(variant < 1 || revision < 1);
+
+ return true;
+}
+
+/*
+ * Mini-probe and validation for the hypervisor.
+ */
+static int smmu_probe(struct hyp_arm_smmu_v3_device *smmu)
+{
+ u32 reg;
+
+ /* Similar to the kernel, rely on firmware override. */
+ if (!(smmu->features & ARM_SMMU_FEAT_COHERENCY))
+ return -EINVAL;
+
+ /* IDR0 */
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR0);
+
+ smmu->features |= smmu_idr0_features(reg);
+ if (!smmu_nesting_supported(smmu))
+ return -ENXIO;
+
+ if (!(smmu->features & (ARM_SMMU_FEAT_TT_LE | ARM_SMMU_FEAT_TT_BE)))
+ return -ENXIO;
+
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR1);
+ if (reg & (IDR1_TABLES_PRESET | IDR1_QUEUES_PRESET | IDR1_REL))
+ return -EINVAL;
+
+ smmu->sid_bits = FIELD_GET(IDR1_SIDSIZE, reg);
+ /* Follows the kernel logic */
+ if (smmu->sid_bits <= STRTAB_SPLIT)
+ smmu->features &= ~ARM_SMMU_FEAT_2_LVL_STRTAB;
+
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3);
+ smmu->features |= smmu_idr3_features(reg);
+
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5);
+ smmu->pgsize_bitmap = smmu_idr5_to_pgsize(reg);
+
+ smmu->oas = smmu_idr5_to_oas(reg);
+ if (smmu->oas == 52)
+ smmu->pgsize_bitmap |= 1ULL << 42;
+ else if (!smmu->oas)
+ smmu->oas = 48;
+
+ return 0;
+}
+
static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu)
{
unsigned long haddr;
@@ -39,8 +111,14 @@ static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu)
return ret;

smmu->base = (void __iomem *)haddr;
+ ret = smmu_probe(smmu);
+ if (ret)
+ goto out_ret;

return 0;
+out_ret:
+ smmu_deinit_device(smmu);
+ return ret;
}

/* Called while is the host is still trusted. */
diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
index 744ee2b7f0b4..82b84673e85b 100644
--- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
@@ -12,12 +12,18 @@
*
* Other members are filled and used at runtime by the SMMU driver.
* @base Virtual address of SMMU registers
+ * @oas PA size
+ * @pgsize_bitmap Supported page sizes
+ * @sid_bits Max number of SID bits supported
*/
struct hyp_arm_smmu_v3_device {
phys_addr_t mmio_addr;
size_t mmio_size;
void __iomem *base;
u32 features;
+ unsigned long oas;
+ unsigned long pgsize_bitmap;
+ unsigned int sid_bits;
};

extern size_t kvm_nvhe_sym(kvm_hyp_arm_smmu_v3_count);
--
2.54.0.545.g6539524ca2-goog