From: "David E. Box" <david.e.box@linux.intel.com>
To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com,
srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com,
david.e.box@linux.intel.com
Cc: hansg@kernel.org, linux-kernel@vger.kernel.org,
platform-driver-x86@vger.kernel.org
Subject: [PATCH V3 07/16] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description
Date: Fri, 1 May 2026 16:10:44 -0700 [thread overview]
Message-ID: <20260501231054.3890305-8-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20260501231054.3890305-1-david.e.box@linux.intel.com>
Add a proper description for the intel_pmc_ssram driver.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
V3 - No changes
V2 - No changes
drivers/platform/x86/intel/pmc/Kconfig | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/intel/pmc/Kconfig
index c6ef0bcf76af..0f19dc7edcf9 100644
--- a/drivers/platform/x86/intel/pmc/Kconfig
+++ b/drivers/platform/x86/intel/pmc/Kconfig
@@ -28,3 +28,14 @@ config INTEL_PMC_CORE
config INTEL_PMC_SSRAM_TELEMETRY
tristate
+ help
+ This PCI driver discovers PMC SSRAM telemetry regions through the
+ PMC's MMIO interface and registers them with the Intel VSEC framework
+ as Intel PMT telemetry devices.
+
+ It probes the PMC SSRAM device, extracts DVSEC information from MMIO,
+ reads device IDs and base addresses for multiple PMCs (main, IOE, PCH),
+ and exposes the discovered telemetry through Intel PMT interfaces
+ (including sysfs).
+
+ This option is selected by INTEL_PMC_CORE.
--
2.43.0
next prev parent reply other threads:[~2026-05-01 23:11 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-01 23:10 [PATCH V3 00/16] Add ACPI-based PMT discovery support for Intel PMC David E. Box
2026-05-01 23:10 ` [PATCH V3 01/16] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing David E. Box
2026-05-01 23:10 ` [PATCH V3 02/16] platform/x86/intel/pmt/crashlog: Split init into pre-decode David E. Box
2026-05-01 23:10 ` [PATCH V3 03/16] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook David E. Box
2026-05-01 23:10 ` [PATCH V3 04/16] platform/x86/intel/pmt: Pass discovery index instead of resource David E. Box
2026-05-01 23:10 ` [PATCH V3 05/16] platform/x86/intel/pmt: Cache the telemetry discovery header David E. Box
2026-05-01 23:10 ` [PATCH V3 06/16] platform/x86/intel/pmt: Unify header fetch and add ACPI source David E. Box
2026-05-01 23:10 ` David E. Box [this message]
2026-05-01 23:10 ` [PATCH V3 08/16] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S David E. Box
2026-05-01 23:10 ` [PATCH V3 09/16] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency David E. Box
2026-05-01 23:10 ` [PATCH V3 10/16] platform/x86/intel/pmc/ssram: Use fixed-size static pmc array David E. Box
2026-05-01 23:10 ` [PATCH V3 11/16] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper David E. Box
2026-05-01 23:10 ` [PATCH V3 12/16] platform/x86/intel/pmc/ssram: Add PCI platform data David E. Box
2026-05-01 23:10 ` [PATCH V3 13/16] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe David E. Box
2026-05-01 23:10 ` [PATCH V3 14/16] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding David E. Box
2026-05-01 23:10 ` [PATCH V3 15/16] platform/x86/intel/pmc/ssram: Make PMT registration optional David E. Box
2026-05-01 23:10 ` [PATCH V3 16/16] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery David E. Box
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