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Miller" , Eric Dumazet , Paolo Abeni , Heiner Kallweit , Russell King , Jacob Keller , Mohsin Bashir , Simon Horman , Lee Trager , Andrew Lunn Cc: mike.marciniszyn@gmail.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 1/4] net: eth: fbnic: Fix addr validation in pcs write Date: Mon, 4 May 2026 09:58:12 -0400 Message-ID: <20260504135815.44226-2-mike.marciniszyn@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260504135815.44226-1-mike.marciniszyn@gmail.com> References: <20260504135815.44226-1-mike.marciniszyn@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: "Mike Marciniszyn (Meta)" The DW IP has two distinct PCS address ranges cooresponding to the C45 PCS registers. The shim translates the PCS addr/regno into specific CSR writes into one of those two zero-relative. This patch fixes a one off in the test that could allow an invalid CSR write if an addr == 2 was called. This patch contains a fix for addr validation in fbnic_mdio_write_pcs() to only return actual CSR reads for addr 0 and 1. There are as of yet, no real impact for the bug as no PCS writes are not yet present. Signed-off-by: Mike Marciniszyn (Meta) --- v3: - put back into the series based on https://lore.kernel.org/all/9ec11642-8035-419c-a896-52f902020bb8@lunn.ch/ - revised commit message will additional details v2: - omitted from patch series v1: https://lore.kernel.org/all/20260428172810.175077-2-mike.marciniszyn@gmail.com/ drivers/net/ethernet/meta/fbnic/fbnic_mdio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c b/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c index 709041f7fc43..d6a124889f52 100644 --- a/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c +++ b/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c @@ -125,7 +125,7 @@ fbnic_mdio_write_pcs(struct fbnic_dev *fbd, int addr, int regnum, u16 val) addr, regnum, val); /* Allow access to both halves of PCS for 50R2 config */ - if (addr > 2) + if (addr >= 2) return; /* Skip write for reserved registers */ -- 2.43.0