From: Nishanth Menon <nm@ti.com>
To: "Richard Genoud (TI)" <richard.genoud@bootlin.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Udit Kumar <u-kumar1@ti.com>,
"Abhash Kumar" <a-kumar2@ti.com>, Beleswar Padhi <b-padhi@ti.com>,
Thomas Richard <thomas.richard@bootlin.com>,
Gregory CLEMENT <gregory.clement@bootlin.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/1] arm64: dts: ti: k3-j7: Reserve memory for LPM meta data
Date: Tue, 5 May 2026 07:59:45 -0500 [thread overview]
Message-ID: <20260505125945.mxucy4cfpno2x66z@slacking> (raw)
In-Reply-To: <20260427160326.370415-2-richard.genoud@bootlin.com>
On 18:03-20260427, Richard Genoud (TI) wrote:
> From: Prasanth Babu Mantena <p-mantena@ti.com>
>
> For TI SOCs J7200, J784S4, J722S, J721s2 which support low power modes,
> a chunk of memory is reserved for LPM meta data, which is needed for
> saving ATF context and the certificate information of ATF and OPTEE and
> DM image. This LPM metadata area is firewalled to be accessed only by
> TIFS.
>
> U-Boot/TIFS will use this area to save and restore:
> - ATF context
> - ATF certificate information
> - OPTEE certificate information
> - DM image
DM image is loaded from storage, correct?
>
> https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/lpm.html#lpm-msg-lpm-save-addr
>
> U-Boot has to parse and retrieve this area from the device tree, thus
> @lpm-memory node are used instead of the generic @memory.
>
> Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
> Signed-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>
> ---
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 6 ++++++
> arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 6 ++++++
> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 6 ++++++
> arch/arm64/boot/dts/ti/k3-j742s2-evm.dts | 9 +++++++++
> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 9 ++++++---
Split this up into platform wise. I dont understand why you'd not modify
the ipc-firmware.dtsi and use the phandle similar to https://lore.kernel.org/all/20260318-topic-am62a-ioddr-dt-v6-19-v3-4-c41473cb23c3@baylibre.com/
Split the patches per ipc-firmware.dtsi as required.
> 5 files changed, 33 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> index 5a8c2e707fde..756928a2d411 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> @@ -40,6 +40,12 @@ mcu_r5fss0_core0_memory_region: memory@a0100000 {
> reg = <0x00 0xa0100000 0x00 0xf00000>;
> no-map;
> };
> +
> + lpm_memory_region: lpm-memory@a4800000 {
vignesh already flagged this in previous revision - just use phandle
reference in u-boot and make this memory@
> + reg = <0x00 0xa4800000 0x00 0x00300000>;
> + no-map;
> + bootph-all;
> + };
> };
>
> mux0: mux-controller-0 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
> index 12a38dd1514b..ceab8f057640 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
> @@ -42,6 +42,12 @@ mcu_r5fss0_core0_memory_region: memory@a0100000 {
> reg = <0x00 0xa0100000 0x00 0xf00000>;
> no-map;
> };
> +
> + lpm_memory_region: lpm-memory@a9c00000 {
> + reg = <0x00 0xa9c00000 0x00 0x00300000>;
> + no-map;
> + bootph-all;
> + };
> };
>
> mux0: mux-controller-0 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> index e66330c71593..eebc5cc7d4cd 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> @@ -63,6 +63,12 @@ wkup_r5fss0_core0_memory_region: memory@a0100000 {
> reg = <0x00 0xa0100000 0x00 0xf00000>;
> no-map;
> };
> +
> + lpm_memory_region: lpm-memory@a6c00000 {
> + reg = <0x00 0xa6c00000 0x00 0x00300000>;
> + no-map;
> + bootph-all;
> + };
> };
>
> vmain_pd: regulator-0 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts
> index fcb7f05d7faf..d0752c8a6b37 100644
> --- a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts
> @@ -23,4 +23,13 @@ memory@80000000 {
> device_type = "memory";
> bootph-all;
> };
> +
> +};
> +
> +&reserved_memory {
> + lpm_memory_region: lpm-memory@ab000000 {
> + reg = <0x00 0xab000000 0x00 0x00300000>;
> + no-map;
> + bootph-all;
> + };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> index 6c7458c76f53..114594f37f0b 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> @@ -23,10 +23,13 @@ memory@80000000 {
> device_type = "memory";
> bootph-all;
> };
> +};
>
> - reserved_memory: reserved-memory {
> - #address-cells = <2>;
> - #size-cells = <2>;
> +&reserved_memory {
> + lpm_memory_region: lpm-memory@ac000000 {
> + reg = <0x00 0xac000000 0x00 0x00300000>;
> + no-map;
> + bootph-all;
> };
> };
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
https://ti.com/opensource
prev parent reply other threads:[~2026-05-05 12:59 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-27 16:03 [PATCH v2 0/1] dts: ti: k3-j7: Reserve memory for LPM metadata Richard Genoud (TI)
2026-04-27 16:03 ` [PATCH v2 1/1] arm64: dts: ti: k3-j7: Reserve memory for LPM meta data Richard Genoud (TI)
2026-05-05 12:59 ` Nishanth Menon [this message]
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