From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2FA72EBB9E; Wed, 6 May 2026 05:48:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778046514; cv=none; b=Yr8CY9EUV+e45rlEwV6eJnu0kp3jGiV8vdjBSNiOPjxYM4/RmnaSiwJeRxUD5L8GatS5CG4rHj+uVZmc30rroejBycRxUKRjnTd4WNZMezQ+g4XKeZhC9nxuSa5KcMXViGvsVEZSBJfl/whcUw7WEzi96RhW4yIM3c/AeBrCqhg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778046514; c=relaxed/simple; bh=szuDVviJkDzC/oxHmClbDGurn2MmrK8v6p2Bb/N4oFQ=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=YwIuammfxBudIANURMvZOnxXpPVQrBnv2VieuZ+dVj2CTRkswccpk7dYazP9AqJffegIaqeCQA8zAMYN0j369dgd3xmTxVWnAF6atReQM/xWXPWJbR618R2QOY9zWGXiQzBSUosKo70TjbQXiTFvl0AH+KnmJK+QiQikcgYtyUg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mfKLAXqi; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mfKLAXqi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C866C2BCB8; Wed, 6 May 2026 05:48:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778046514; bh=szuDVviJkDzC/oxHmClbDGurn2MmrK8v6p2Bb/N4oFQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=mfKLAXqiX0aUDCWn8xnZhaPoLKGt3MieK7LbgzEmMoT/P13+U1zLUaTQIrMfmBTON KdFtWnfI+y8hsXnG6GnQKh3ml2hjyNpL4AFpiJTZOfwnqHN79AWWampzHGXVv1nTgG ETLYvVIGClWrodDRM/aVW+tiXw5w8SiWYEAN7F5b+G6A4e2zcS7reA2Ukl+4G4GOQ/ Hfzh/RAse7VDn+X2wfXTC4IgGLD9f5L5BVjjwTzPSVAY3ZJByUmBK3d1ZYoLgI4/qP 7zoSTemsBsGefB/1PkINEgKuJO54gWQZsVDXspBZJ2dbyUKEjSPQZGfyo6EQsOXJLI 9jSm/fMeV8E+Q== Date: Wed, 6 May 2026 13:48:28 +0800 From: Nathan Chancellor To: Arnd Bergmann Cc: Rosen Penev , linux-mm@kvack.org, Greg Kroah-Hartman , Andrew Morton , "David Hildenbrand (Red Hat)" , Lorenzo Stoakes , "Liam R. Howlett" , "Vlastimil Babka (SUSE)" , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , Nick Desaulniers , Bill Wendling , Justin Stitt , open list , "open list:CLANG/LLVM BUILD SUPPORT:Keyword:b(?i:clang|llvm)b" Subject: Re: [PATCH] mm: move phys_mem_access_prot_allowed to header Message-ID: <20260506054828.GA8550@ax162> References: <20260505010112.645361-1-rosenp@gmail.com> <0f11390f-e8bd-4f8d-aea8-59ef545b2c32@app.fastmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Tue, May 05, 2026 at 11:22:13AM +0200, Arnd Bergmann wrote: > On Tue, May 5, 2026, at 10:54, Rosen Penev wrote: > > On Tue, May 5, 2026 at 1:29 AM Arnd Bergmann wrote: > >> > >> Does this happen with both ld.bfd and ld.lld? Which version of clang > >> and lld are you using? > > clang version 22.1.3 > > Target: x86_64-pc-linux-gnu > > Thread model: posix > > InstalledDir: /usr/bin > > > > lld the same. > > Ok. I've tried to reproduce this with Nathan's llvm-22.1.3 build > from https://mirrors.edge.kernel.org/pub/tools/llvm/, but don't > see this problem on mips defconfig. Are you using a particular > configuration, or do you see this on every build? This is just the same old integrated assembler vs. recordmcount bug: https://github.com/ClangBuiltLinux/linux/issues/981 https://github.com/ClangBuiltLinux/linux/issues/1830 It requires CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y with ftrace, which MIPS allmodconfig enables. PowerPC worked around this in commit f8b2336f15f3 ("powerpc: Avoid dead code/data elimination when using recordmcount"). Maybe something along the same lines should be done for MIPS. Cheers, Nathan