[PATCH 5/7] drm/tyr: add USER register page definitions

[Deborah Brouwer <deborah.brouwer@collabora.com>]

Add the USER register page definition and the LATEST_FLUSH register used
to track GPU cache flush completion.

The USER register page is read-only and user-accessible. Tyr will use
these definitions to support the Panthor userspace-MMIO mmap interface,
which exposes the flush tracking register directly to userspace.

Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com>
---
 drivers/gpu/drm/tyr/regs.rs | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/tyr/regs.rs b/drivers/gpu/drm/tyr/regs.rs
index 562023e5df2f..98d5625f5bb1 100644
--- a/drivers/gpu/drm/tyr/regs.rs
+++ b/drivers/gpu/drm/tyr/regs.rs
@@ -1633,6 +1633,24 @@ fn from(sh: PtwShareability) -> Self {
     }
 }
 
+/// This register corresponds to the USER register page.
+///
+/// This register page is read-only and user-mode accessible.
+/// It exposes cache flush tracking to userspace.
+pub(crate) mod user {
+    use kernel::register;
+
+    register! {
+        /// Latest flush ID register. Read-only.
+        pub(crate) LATEST_FLUSH(u32) @ 0x10000 {
+            /// Incremented when a full GPU cache clean-and-invalidate completes.
+            23:0    flush_id;
+            /// Indicates that a cache flush operation is currently pending.
+            31:31   active => bool;
+        }
+    }
+}
+
 /// This module corresponds to the DOORBELL_BLOCK_n[0-63] register pages.
 pub(crate) mod doorbell_block {
     use kernel::register;

-- 
2.53.0