From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12FF13A5456 for ; Fri, 8 May 2026 09:42:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778233331; cv=none; b=Xv2Zi1brgkt0o9z+oVtfZPSOMYkIUnYUwJENcTgX9d+zh7WgcDCwV+l+z7+WmPzA/s9ZkIhrT021tMOmSBCgOT2fmZtnbKQ2Ln33dtKfsFyAbOX2wpKLczCf9xNi8tnKreyeN60EIAXQ7/2N1jfPDKbh9+yl5IYv109pGae4S0s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778233331; c=relaxed/simple; bh=RWsHN5U+WMS2JsLtHvvjkJBwH8qQN/pVdfbYmms77H8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=p8i4RMU5VP/EkPMZQ+dsuGIFq+tZxnr1BPqTl2jXpmo+tGFtzbtUOgaHwgzzlYZutBk4KBnNWWuCidQMi6bVzOT8J+Los8zEtReKm4j6kKOwA9cK4r/VXv6ig4BL9StBxLJTbstavFoGSErTOOYS30F6pF92kTVlKVEULhtugGw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Eqmf2fbs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Eqmf2fbs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DF666C2BCF7; Fri, 8 May 2026 09:42:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778233330; bh=RWsHN5U+WMS2JsLtHvvjkJBwH8qQN/pVdfbYmms77H8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Eqmf2fbsQbA2BWPyWIMWJfUkvGnX1XSkcqElAl/39PV8yUZVZKrsjcu6eyfzZ29PN PGSC1+cWZv0zzifpt79p8yA7mknws+KJmbQiEgjMIUOrhxh9BCVaA/ynvGEcjvHJ0r xhq9bt5O8a+v81ITtamh17GXTQkoYWZwvkC9Aghrzm6lEULDxqJFYOnCEXmbxbxoad Y9xJSM6JzwoLyW8uIvBNkpgbhQJ+IldsKxLWI4VSiEp1f+T02Vr5KgVVTTFCqxIbuP aUuy1r3N24ArnE31hwc0JtMdbdV+Em5G4+z83FRcXkHFYL4r8oDq259fNwijm2AwfN QxVGzH3i5hGiA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wLHij-00000000HJz-0Yy7; Fri, 08 May 2026 09:42:09 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Catalin Marinas , Will Deacon , Mark Rutland , Thomas Gleixner , Ben Horgan , Daniel Lezcano Subject: [PATCH v2 3/5] clocksource/drivers/arm_arch_timer: Drop the arch_counter_get_cnt{p,v}ct_stable() accessors Date: Fri, 8 May 2026 10:42:01 +0100 Message-ID: <20260508094203.2913880-4-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260508094203.2913880-1-maz@kernel.org> References: <20260508094203.2913880-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, tglx@kernel.org, ben.horgan@arm.com, daniel.lezcano@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Further simplify the counter accessors by eliminating the *_stable() ones, which serve little purpose at this stage. Signed-off-by: Marc Zyngier --- drivers/clocksource/arm_arch_timer.c | 38 +++++++++------------------- 1 file changed, 12 insertions(+), 26 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 723ba698b8c46..ee21804d6613c 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -100,19 +100,12 @@ static noinstr u64 raw_counter_get_cntpct(void) return __arch_counter_get_cntpct(); } -static notrace u64 arch_counter_get_cntpct_stable(void) +static notrace u64 arch_counter_get_cntpct(void) { - u64 val; - preempt_disable_notrace(); - val = __arch_counter_get_cntpct_stable(); - preempt_enable_notrace(); - return val; -} - -static noinstr u64 arch_counter_get_cntpct(void) -{ - if (arch_counter_broken_accessors()) - return arch_counter_get_cntpct_stable(); + if (arch_counter_broken_accessors()) { + guard(preempt_notrace)(); + return __arch_counter_get_cntpct_stable(); + } return __arch_counter_get_cntpct(); } @@ -125,19 +118,12 @@ static noinstr u64 raw_counter_get_cntvct(void) return __arch_counter_get_cntvct(); } -static notrace u64 arch_counter_get_cntvct_stable(void) +static notrace u64 arch_counter_get_cntvct(void) { - u64 val; - preempt_disable_notrace(); - val = __arch_counter_get_cntvct_stable(); - preempt_enable_notrace(); - return val; -} - -static noinstr u64 arch_counter_get_cntvct(void) -{ - if (arch_counter_broken_accessors()) - return arch_counter_get_cntvct_stable(); + if (arch_counter_broken_accessors()) { + guard(preempt_notrace)(); + return __arch_counter_get_cntvct_stable(); + } return __arch_counter_get_cntvct(); } @@ -342,10 +328,10 @@ void erratum_set_next_event_generic(const int access, unsigned long evt, ctrl &= ~ARCH_TIMER_CTRL_IT_MASK; if (access == ARCH_TIMER_PHYS_ACCESS) { - cval = evt + arch_counter_get_cntpct_stable(); + cval = evt + arch_counter_get_cntpct(); write_sysreg(cval, cntp_cval_el0); } else { - cval = evt + arch_counter_get_cntvct_stable(); + cval = evt + arch_counter_get_cntvct(); write_sysreg(cval, cntv_cval_el0); } -- 2.47.3