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Mon, 11 May 2026 06:01:21 -0700 (PDT) Received: from localhost ([2601:1c0:5000:d5c:4ec8:83f5:8254:6891]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83965a3e3ecsm20908324b3a.19.2026.05.11.06.01.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 May 2026 06:01:20 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Akhil P Oommen , Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v5 09/16] drm/msm: Add per-context perfcntr state Date: Mon, 11 May 2026 05:59:22 -0700 Message-ID: <20260511130017.96867-10-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260511130017.96867-1-robin.clark@oss.qualcomm.com> References: <20260511130017.96867-1-robin.clark@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=fOsJG5ae c=1 sm=1 tr=0 ts=6a01d324 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=xqWC_Br6kY4A:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=OtV_UDYxk2hhjaRdRjwA:9 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTExMDE0NCBTYWx0ZWRfX5lWEyVYylp/0 +HDAsg+XHNjTWeBj4hzldvMyb2qrEcoaMM47WEjExhsO8DvK8j9vH3KUsi+dcXwB63pNINHQbHF 58xvmeglvO8wpZC2akTHyijKUhzvKAG/hPptOIATI7JCo4LtqmA3Pa4gaH8vboAmvO4O1MVZs8x S4WiRnfHd6W3OEVW4k1VJXQk+VOVLrFWPK3KFqjUaSbC0Nok2MFm/w8N+a0frP+F0EC2JpyLuWU dhxftCBJ764ntQLFYVFf7ipvmTRkN917fEO3CZ38tUAwYKD4i8Z/sfsnUJgFCt0ndgVyNwMbXZ0 6VsFY16B303cDDcTMH/EGSRrS9UFwTcLccueqR0TBskpA3xZEKkkzDTG3/xhgWl6T26m/LAX+cW NfYb+AjYKciL1xH+lJhdsxUlUe0xNTp36es+kIqgXU9DZn6JyswEY2fjE3BwHRahQWy4eCXDbFY QFt87W2dAgGVttiyrgg== X-Proofpoint-GUID: BBi8vQwS9FgsE8BfuC13aUQO3bGO6NXx X-Proofpoint-ORIG-GUID: BBi8vQwS9FgsE8BfuC13aUQO3bGO6NXx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-11_03,2026-05-08_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 impostorscore=0 bulkscore=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 phishscore=0 spamscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605110144 The upcoming PERFCNTR_CONFIG ioctl will allow for both global counter collection, and per-context counter reservation for local (ie. within a single GEM_SUBMIT ioctl) counter collection. Any number of contexts can reserve the same counters, but we will need to ensure that counters reserved for local counter collection do not conflict with counters used for global counter collection. So add tracking for per-context local counter reservations. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gpu.h | 5 +++++ drivers/gpu/drm/msm/msm_perfcntr.h | 21 +++++++++++++++++++++ drivers/gpu/drm/msm/msm_submitqueue.c | 1 + 3 files changed, 27 insertions(+) diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 9e5c753437c2..19484774f369 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -434,6 +434,11 @@ struct msm_context { * this context. */ atomic64_t ctx_mem; + + /** + * @perfcntrs: Per-context reserved perfcntrs state + */ + struct msm_perfcntr_context_state *perfctx; }; struct drm_gpuvm *msm_context_vm(struct drm_device *dev, struct msm_context *ctx); diff --git a/drivers/gpu/drm/msm/msm_perfcntr.h b/drivers/gpu/drm/msm/msm_perfcntr.h index 64a5d29feba1..7f0654182496 100644 --- a/drivers/gpu/drm/msm/msm_perfcntr.h +++ b/drivers/gpu/drm/msm/msm_perfcntr.h @@ -35,6 +35,27 @@ struct msm_perfcntr_group { const struct msm_perfcntr_counter *counters; }; +/** + * struct msm_perfcntr_context_state - per-msm_context counter state + * + * A given counter can either be unused, reserved for global counter + * collection exclusively, or reserved for local per-context counter + * collection inclusively. Multiple contexts can reserve the same + * counter, since SEL reg programming and counter begin/end sampling + * happen locally (within a single GEM_SUBMIT ioctl). + */ +struct msm_perfcntr_context_state { + /** @dummy: Some compilers dislike structs with only a flex array */ + unsigned dummy; + + /** + * @reserved_counters: + * + * The number of reserved counters indexed by perfcntr group. + */ + unsigned reserved_counters[]; +}; + extern const struct msm_perfcntr_group a6xx_perfcntr_groups[]; extern const unsigned a6xx_num_perfcntr_groups; diff --git a/drivers/gpu/drm/msm/msm_submitqueue.c b/drivers/gpu/drm/msm/msm_submitqueue.c index 2598d674a99d..a58fe41602c6 100644 --- a/drivers/gpu/drm/msm/msm_submitqueue.c +++ b/drivers/gpu/drm/msm/msm_submitqueue.c @@ -66,6 +66,7 @@ void __msm_context_destroy(struct kref *kref) drm_gpuvm_put(ctx->vm); kfree(ctx->comm); kfree(ctx->cmdline); + kfree(ctx->perfctx); kfree(ctx); } -- 2.54.0