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(unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 3e1830300; Tue, 12 May 2026 17:56:49 +0800 (GMT+08:00) From: Damon Ding To: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, nicolas.frattaroli@collabora.com, cristian.ciocaltea@collabora.com, sebastian.reichel@collabora.com, dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com, dianders@chromium.org, m.szyprowski@samsung.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Damon Ding Subject: [PATCH v4 01/10] dt-bindings: display: rockchip: analogix-dp: Allow hclk as third clock Date: Tue, 12 May 2026 17:56:35 +0800 Message-Id: <20260512095644.1946084-2-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260512095644.1946084-1-damon.ding@rock-chips.com> References: <20260512095644.1946084-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-HM-Tid: 0a9e1b9e258103a3kunm05d2ddd612902e X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlCTx0dVk0ZHU0YSUNDTUNCHVYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSE pKQk1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=CZOQs8ucFjEZ/XC513PTVYRaizC72MbfLUxY+I9Erc496m3F+ZCNR9jm6pE/SH/+GB5G3kHocmwwSmKbg0ndueRyIlNqN43o/m2bMN4+XmhXtx0HM5ap45ProfAojxhlogIKT3nQXaOw1ySNxNw1WBodLkLyfR2xttA21aEg8aE=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=+s6o7nWiNGnkI05Bo7gP3oJbsS7gigOdqw2CTRuk2Ng=; h=date:mime-version:subject:message-id:from; RK3588 eDP controller requires HCLK_VO1 (video output bus clock) to access the VO1 GRF registers and enable the video datapath. Previously, the clock was enabled implicitly via the 'rockchip,vo-grf' phandle reference, which allowed the eDP to work without explicitly managing the hclk_vo1 clock. However, this is not safe or explicit. To align with other display controllers (HDMI) on RK3588 and make the clock requirement explicit, expand clock-names to support either "grf" (for older SoCs) or "hclk" (for RK3588) as the third clock. This makes the clock dependency clear and removes reliance on implicit clock enablement from GRF phandle. Fixes: f855146263b1 ("dt-bindings: display: rockchip: analogix-dp: Add support for RK3588") Signed-off-by: Damon Ding --- Changes in v4: - Modify the commit msg. --- .../bindings/display/rockchip/rockchip,analogix-dp.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml index d99b23b88cc5..d2bc8636b626 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml @@ -26,7 +26,9 @@ properties: items: - const: dp - const: pclk - - const: grf + - enum: + - grf + - hclk power-domains: maxItems: 1 -- 2.34.1