From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE727379C32 for ; Wed, 13 May 2026 08:44:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778661898; cv=none; b=uXm7xUPitJgn9M4eLBMmJyNYbidfGrjDeevl7jl4Xv9ZqoUOqz2/laQV7/HfLl8iuHYxnpPoFpp6yU2NqJe5Zdgfd9zQrS0SFiV9xxmrWV6ia0mkGvJBXGEnd63ggo5oqBTTZNAzjNBSnInRYeLSyfqbuUqyp5/xhViYfZtXyBE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778661898; c=relaxed/simple; bh=wiDCBOwq5enTpnnegMkeburnpNjYmEPN9NiWi9ZR5wk=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OHfDb9EQfhELCvF0gzDsGN3OBtUUVmqM96lhltHl5//eDaKYn51Bm+tYdRCCvu1hIrKh6bZ8Av7SqDziEQ/vsiKU8v5tBFTbFZY3Z6y7LQJA3MYbxCSvNNbQL2qxmqPD45R04+3DBrVXY+zxGw04xO2SlAatNGIsXO+30K9bnNc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=j7IzMQzs; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="j7IzMQzs" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1778661895; bh=wiDCBOwq5enTpnnegMkeburnpNjYmEPN9NiWi9ZR5wk=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=j7IzMQzsabo6iAV/yLVY76emBHSQwiKdj1TZG7+Cr05nD6aR1H0zv1RHC9JqW4Nav x1T1vZNDysZtQyeFZClImxxCAJ6/0/YsYjjfjXwbufqEqmvCE9pRI7MYD8h06TVjkK cJ5Ca5fkQve8SR/31eAonaKT/4of/6YvIJT/Yr1yx0Zw5KJo2Exxj/U3CGNV1/huAK DUbf01+EDfPQCDCaTinYzqtjcV4RUmLpxDBS6eDCZT3BGlpXgHacqBIPUMPxrr6nuE 3itJgYtrdhD7ZoEYahAekYxesEK1pTg1dtXyI5rIDfNafeJ0PQsg1S4lBrenKV9ezp 82s8mbEOM37tw== Received: from fedora (unknown [100.64.0.11]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: bbrezillon) by bali.collaboradmins.com (Postfix) with ESMTPSA id 9EFFF17E0443; Wed, 13 May 2026 10:44:54 +0200 (CEST) Date: Wed, 13 May 2026 10:44:51 +0200 From: Boris Brezillon To: Chia-I Wu Cc: Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 09/11] drm/panthor: Process FW events in IRQ context Message-ID: <20260513104451.28c65c9b@fedora> In-Reply-To: References: <20260512-panthor-signal-from-irq-v2-0-95c614a739cb@collabora.com> <20260512-panthor-signal-from-irq-v2-9-95c614a739cb@collabora.com> Organization: Collabora X-Mailer: Claws Mail 4.4.0 (GTK 3.24.52; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Tue, 12 May 2026 15:09:47 -0700 Chia-I Wu wrote: > On Tue, May 12, 2026 at 3:05=E2=80=AFPM Chia-I Wu wro= te: > > > > On Tue, May 12, 2026 at 4:54=E2=80=AFAM Boris Brezillon > > wrote: =20 > > > > > > Now that everything is set to allow processing FW events in IRQ conte= xt, > > > go for it. This should reduce the dma_fence signaling latency. > > > > > > Signed-off-by: Boris Brezillon > > > --- > > > drivers/gpu/drm/panthor/panthor_fw.c | 27 +++++++++++++++++++++++---- > > > 1 file changed, 23 insertions(+), 4 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/p= anthor/panthor_fw.c > > > index f5e0ceca4130..8cfebf180de7 100644 > > > --- a/drivers/gpu/drm/panthor/panthor_fw.c > > > +++ b/drivers/gpu/drm/panthor/panthor_fw.c > > > @@ -1087,9 +1087,29 @@ static void panthor_job_irq_handler(struct pan= thor_irq *pirq, u32 status) > > > } > > > } > > > > > > -static irqreturn_t panthor_job_irq_threaded_handler(int irq, void *d= ata) > > > +static irqreturn_t panthor_job_irq_raw_handler(int irq, void *data) > > > { > > > - return panthor_irq_default_threaded_handler(data, panthor_job= _irq_handler); > > > + struct panthor_irq *pirq =3D data; > > > + > > > + if (!gpu_read(pirq->iomem, INT_STAT)) > > > + return IRQ_NONE; > > > + > > > + scoped_guard(spinlock_irqsave, &pirq->mask_lock) { > > > + if (pirq->state !=3D PANTHOR_IRQ_STATE_ACTIVE) > > > + return IRQ_NONE; > > > + > > > + pirq->state =3D PANTHOR_IRQ_STATE_PROCESSING; > > > + } > > > + > > > + /* We can use INT_STAT here, because we didn't mask the IRQs.= */ > > > + panthor_job_irq_handler(pirq, gpu_read(pirq->iomem, INT_STAT)= ); =20 > > We should loop here until INT_STAT is cleared. =20 > Perhaps not. This is hardirq. Yep, the absence of loop is intentional here. We process it one at a time, and give other interrupt handlers a chance to do their stuff before we get called again. >=20 > Reviewed-by: Chia-I Wu > > > + > > > + scoped_guard(spinlock_irqsave, &pirq->mask_lock) { > > > + if (pirq->state =3D=3D PANTHOR_IRQ_STATE_PROCESSING) > > > + pirq->state =3D PANTHOR_IRQ_STATE_ACTIVE; > > > + } > > > + > > > + return IRQ_HANDLED; > > > } > > > > > > static int panthor_fw_start(struct panthor_device *ptdev) > > > @@ -1489,8 +1509,7 @@ int panthor_fw_init(struct panthor_device *ptde= v) > > > > > > ret =3D panthor_irq_request(ptdev, &fw->irq, irq, 0, > > > ptdev->iomem + JOB_INT_BASE, "job", > > > - panthor_irq_default_raw_handler, > > > - panthor_job_irq_threaded_handler); > > > + panthor_job_irq_raw_handler, NULL); > > > if (ret) { > > > drm_err(&ptdev->base, "failed to request job irq"); > > > return ret; > > > > > > -- > > > 2.54.0 > > > =20