From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5BB034C77BC for ; Fri, 15 May 2026 16:26:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778862409; cv=none; b=o5Res7qwdMU4v3swp8N3mscN2CxlX6eeKz9RTrx0wvRBgdgEUI3CZPulf9bcVOIHReOOh2rPzXDZ2dVr3FnLennp+v0EqqUoTbzt46MtLaxd0eu6ub/bpzXx7s4a3Zp3D1pyT3tgAeBs5y6i2vvjv/IkmX6pS0iHyWyKhuK4E/k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778862409; c=relaxed/simple; bh=rmo72hvT7oVdD8KLIA0ACavIj7twlGv7h7oHGIOnbQE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=U7Lu8Ly/nVsvwcrdVAVW58a5MvMxkTWeXvikQ8G+ZXgveqz/lnJ1kZemjnf5JPdjw7+568/yk3Eh9hGz2zU8FEI9Om/0cDz7DACsw6iCnPt0JvD8AB9ih0rVTbEdgH4+xl343yeI6QdAqV6RtzoZ2E99htTNo5bovXUna+erMNY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=KqBFQuWb; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="KqBFQuWb" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778862408; x=1810398408; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rmo72hvT7oVdD8KLIA0ACavIj7twlGv7h7oHGIOnbQE=; b=KqBFQuWbQobDW8rvstpIaBEZc4j3m9BmN3owmPB1gYx/SIbAR6ShtRQr H4hANPgW2Qkg5FLEIZ4BIiFNpITCgwXqH8TvO38IP6COGRaK6RM20F3wJ zLhBpMbbXtzSXfRJRcEE2XCK6eFwH3dni2mC7XVQL/kax6EvRBz1ARhg6 vhWlN0YPJ2MALs2xbWFFYC2yV5+q6rah48zsKhc6kwbaqm/9JyScVXjKz 2Py3XvzLfTBlY/sAE68Y/kzbKzmPou0SDL2gTwqS9ccLRs/NaxOU/oHS2 aBoMAqXyEMkD7TUwHW/LBNRgWSqoEe767sEbTSIXKkoxGE5IWH2FWC5N4 w==; X-CSE-ConnectionGUID: 5krxq9e0TruFjIHZi/ygIw== X-CSE-MsgGUID: AfVzDcrtRFKctZWnFDA0ig== X-IronPort-AV: E=McAfee;i="6800,10657,11787"; a="79785255" X-IronPort-AV: E=Sophos;i="6.23,236,1770624000"; d="scan'208";a="79785255" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 May 2026 09:26:48 -0700 X-CSE-ConnectionGUID: HmCIGNQ1QUORZf5EOLj3eA== X-CSE-MsgGUID: O41tTOXuRninxzeWxc6ErQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,236,1770624000"; d="scan'208";a="238857207" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO ahunter6-desk) ([10.245.245.28]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 May 2026 09:26:46 -0700 From: Adrian Hunter To: alexandre.belloni@bootlin.com Cc: Frank.Li@nxp.com, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V4 07/17] i3c: mipi-i3c-hci: Complete transfer lists immediately on error Date: Fri, 15 May 2026 19:26:11 +0300 Message-ID: <20260515162621.57719-8-adrian.hunter@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515162621.57719-1-adrian.hunter@intel.com> References: <20260515162621.57719-1-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: 8bit In DMA mode, transfer lists are currently completed only when the final transfer in the list completes. If an earlier transfer fails, the list is left incomplete and callers wait until timeout. There is no need to wait for a timeout, as the completion path in i3c_hci_process_xfer() already checks for error status. Complete the transfer list as soon as any transfer in the list reports an error. This avoids unnecessary delays and spurious timeouts on error. Complete a transfer list completion immediately there is an error. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li --- Changes in V4: Add Frank's Rev'd-by Changes in V3: None Changes in V2: Renamed completing_xfer to final_xfer drivers/i3c/master/mipi-i3c-hci/dma.c | 6 ++++-- drivers/i3c/master/mipi-i3c-hci/hci.h | 1 + 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c index de0f17706ac8..83b553e1ab0b 100644 --- a/drivers/i3c/master/mipi-i3c-hci/dma.c +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c @@ -502,6 +502,8 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer = xfer_list + i; u32 *ring_data = rh->xfer + rh->xfer_struct_sz * enqueue_ptr; + xfer->final_xfer = xfer_list + n - 1; + /* store cmd descriptor */ *ring_data++ = xfer->cmd_desc[0]; *ring_data++ = xfer->cmd_desc[1]; @@ -576,8 +578,8 @@ static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh) tid, xfer->cmd_tid); /* TODO: do something about it? */ } - if (xfer->completion) - complete(xfer->completion); + if (xfer == xfer->final_xfer || RESP_STATUS(resp)) + complete(xfer->final_xfer->completion); if (RESP_STATUS(resp)) hci->enqueue_blocked = true; } diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h index d630400ec945..f07fc627d4d2 100644 --- a/drivers/i3c/master/mipi-i3c-hci/hci.h +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h @@ -104,6 +104,7 @@ struct hci_xfer { struct { /* DMA specific */ struct i3c_dma *dma; + struct hci_xfer *final_xfer; int ring_number; int ring_entry; }; -- 2.51.0