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From: Thomas Gleixner <tglx@kernel.org>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Michael Kelley <mhklinux@outlook.com>,
	Dmitry Ilvokhin <d@ilvokhin.com>, Radu Rendec <radu@rendec.net>,
	Jan Kiszka <jan.kiszka@siemens.com>,
	Kieran Bingham <kbingham@kernel.org>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Marc Zyngier <maz@kernel.org>
Subject: [patch V6 07/16] scripts/gdb: Update x86 interrupts to the array based storage
Date: Sun, 17 May 2026 22:02:04 +0200	[thread overview]
Message-ID: <20260517194931.442613033@kernel.org> (raw)
In-Reply-To: 20260517194421.705253664@kernel.org

From: Thomas Gleixner <tglx@kernel.org>

x86 changed the interrupt statistics from a struct with individual members
to an counter array. It also provides a corresponding info array with the
strings for prefix and description and an indicator to skip the entry.

Update the already out of sync GDB script to use the counter and the info
array, which keeps the GDB script in sync automatically.

Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
V6: Fixup alignment for interrupts - Radu
V5: Bring the show_err_irq() back as it is used on mips
    Fix the index calculation for the show bitmap so it works with more than one
    unsigned long.
V4: Adopted to irq_stat_count_show bitmap and removed the duplicate ERR/MIS output
V3: New patch - Radu
---
 scripts/gdb/linux/interrupts.py |   71 ++++++++++------------------------------
 1 file changed, 18 insertions(+), 53 deletions(-)
--- a/scripts/gdb/linux/interrupts.py
+++ b/scripts/gdb/linux/interrupts.py
@@ -48,7 +48,7 @@ irq_desc_type = utils.CachedType("struct
             count = cpus.per_cpu(desc['kstat_irqs'], cpu)['cnt']
         else:
             count = 0
-        text += "%10u" % (count)
+        text += "%10u " % (count)
 
     name = "None"
     if desc['irq_data']['chip']:
@@ -58,7 +58,7 @@ irq_desc_type = utils.CachedType("struct
         else:
             name = "-"
 
-    text += "  %8s" % (name)
+    text += "  %-8s" % (name)
 
     if desc['irq_data']['domain']:
         text += "  %*lu" % (prec, desc['irq_data']['hwirq'])
@@ -97,64 +97,29 @@ irq_desc_type = utils.CachedType("struct
         text += "%*s: %10u\n" % (prec, "ERR", cnt['counter'])
     return text
 
-def x86_show_irqstat(prec, pfx, field, desc):
-    irq_stat = gdb.parse_and_eval("&irq_stat")
+def x86_show_irqstat(prec, pfx, idx, desc):
+    irq_stat = gdb.parse_and_eval("&irq_stat.counts[%d]" %idx)
     text = "%*s: " % (prec, pfx)
     for cpu in cpus.each_online_cpu():
         stat = cpus.per_cpu(irq_stat, cpu)
-        text += "%10u " % (stat[field])
-    text += "  %s\n" % (desc)
-    return text
-
-def x86_show_mce(prec, var, pfx, desc):
-    pvar = gdb.parse_and_eval(var)
-    text = "%*s: " % (prec, pfx)
-    for cpu in cpus.each_online_cpu():
-        text += "%10u " % (cpus.per_cpu(pvar, cpu).dereference())
-    text += "  %s\n" % (desc)
+        text += "%10u " % (stat.dereference())
+    text += desc
     return text
 
 def x86_show_interupts(prec):
-    text = x86_show_irqstat(prec, "NMI", '__nmi_count', 'Non-maskable interrupts')
+    info_type = gdb.lookup_type('struct irq_stat_info')
+    info = gdb.parse_and_eval('irq_stat_info')
+    bitmap = gdb.parse_and_eval('irq_stat_count_show')
+    bitsperlong = 8 * int(bitmap.type.target().sizeof)
 
-    if constants.LX_CONFIG_X86_LOCAL_APIC:
-        text += x86_show_irqstat(prec, "LOC", 'apic_timer_irqs', "Local timer interrupts")
-        text += x86_show_irqstat(prec, "SPU", 'irq_spurious_count', "Spurious interrupts")
-        text += x86_show_irqstat(prec, "PMI", 'apic_perf_irqs', "Performance monitoring interrupts")
-        text += x86_show_irqstat(prec, "IWI", 'apic_irq_work_irqs', "IRQ work interrupts")
-        text += x86_show_irqstat(prec, "RTR", 'icr_read_retry_count', "APIC ICR read retries")
-        if utils.gdb_eval_or_none("x86_platform_ipi_callback") is not None:
-            text += x86_show_irqstat(prec, "PLT", 'x86_platform_ipis', "Platform interrupts")
-
-    if constants.LX_CONFIG_SMP:
-        text += x86_show_irqstat(prec, "RES", 'irq_resched_count', "Rescheduling interrupts")
-        text += x86_show_irqstat(prec, "CAL", 'irq_call_count', "Function call interrupts")
-        text += x86_show_irqstat(prec, "TLB", 'irq_tlb_count', "TLB shootdowns")
-
-    if constants.LX_CONFIG_X86_THERMAL_VECTOR:
-        text += x86_show_irqstat(prec, "TRM", 'irq_thermal_count', "Thermal events interrupts")
-
-    if constants.LX_CONFIG_X86_MCE_THRESHOLD:
-        text += x86_show_irqstat(prec, "THR", 'irq_threshold_count', "Threshold APIC interrupts")
-
-    if constants.LX_CONFIG_X86_MCE_AMD:
-        text += x86_show_irqstat(prec, "DFR", 'irq_deferred_error_count', "Deferred Error APIC interrupts")
-
-    if constants.LX_CONFIG_X86_MCE:
-        text += x86_show_mce(prec, "&mce_exception_count", "MCE", "Machine check exceptions")
-        text += x86_show_mce(prec, "&mce_poll_count", "MCP", "Machine check polls")
-
-    text += show_irq_err_count(prec)
-
-    if constants.LX_CONFIG_X86_IO_APIC:
-        cnt = utils.gdb_eval_or_none("irq_mis_count")
-        if cnt is not None:
-            text += "%*s: %10u\n" % (prec, "MIS", cnt['counter'])
-
-    if constants.LX_CONFIG_KVM:
-        text += x86_show_irqstat(prec, "PIN", 'kvm_posted_intr_ipis', 'Posted-interrupt notification event')
-        text += x86_show_irqstat(prec, "NPI", 'kvm_posted_intr_nested_ipis', 'Nested posted-interrupt event')
-        text += x86_show_irqstat(prec, "PIW", 'kvm_posted_intr_wakeup_ipis', 'Posted-interrupt wakeup event')
+    text = ""
+    for idx in range(int(info.type.sizeof / info_type.sizeof)):
+        show = bitmap[int(idx / bitsperlong)]
+        if not show & 1 << int(idx % bitsperlong):
+            continue
+        pfx = info[idx]['symbol'].string()
+        desc = info[idx]['text'].string()
+        text += x86_show_irqstat(prec, pfx, idx, desc)
 
     return text
 


  parent reply	other threads:[~2026-05-17 20:02 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-17 20:01 [patch V6 00/16] Improve /proc/interrupts further Thomas Gleixner
2026-05-17 20:01 ` [patch V6 01/16] x86/irq: Optimize interrupts decimals printing Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Dmitry Ilvokhin
2026-05-17 20:01 ` [patch V6 02/16] genirq/proc: Avoid formatting zero counts in /proc/interrupts Thomas Gleixner
2026-05-19 21:24   ` Shrikanth Hegde
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:01 ` [patch V6 03/16] genirq/proc: Utilize irq_desc::tot_count to avoid evaluation Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:01 ` [patch V6 04/16] x86/irq: Make irqstats array based Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:01 ` [patch V6 05/16] x86/irq: Suppress unlikely interrupt stats by default Thomas Gleixner
2026-05-21 15:52   ` Shrikanth Hegde
2026-05-21 20:46     ` Thomas Gleixner
2026-05-23 17:48   ` Shrikanth Hegde
2026-05-24 12:37     ` Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:01 ` [patch V6 06/16] x86/irq: Move IOAPIC misrouted and PIC/APIC error counts into irq_stats Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` Thomas Gleixner [this message]
2026-05-26 14:22   ` [tip: irq/core] scripts/gdb: Update x86 interrupts to the array based storage tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 08/16] genirq: Expose nr_irqs in core code Thomas Gleixner
2026-05-19 21:29   ` Shrikanth Hegde
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 09/16] genirq/manage: Make NMI cleanup RT safe Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 10/16] genirq: Cache the condition for /proc/interrupts exposure Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 11/16] genirq: Calculate precision only when required Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 12/16] genirq/proc: Increase default interrupt number precision to four Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 13/16] genirq: Add rcuref count to struct irq_desc Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 14/16] genirq: Expose irq_find_desc_at_or_after() in core code Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 15/16] genirq/proc: Runtime size the chip name Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-17 20:02 ` [patch V6 16/16] genirq/proc: Speed up /proc/interrupts iteration Thomas Gleixner
2026-05-26 14:22   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2026-05-18  3:54 ` [patch V6 00/16] Improve /proc/interrupts further mhklkml
2026-05-19 21:18 ` Shrikanth Hegde
2026-05-20 15:27   ` Thomas Gleixner
2026-05-21  4:34     ` Shrikanth Hegde
2026-05-21  7:53       ` Thomas Gleixner
2026-05-21 14:48         ` Shrikanth Hegde
2026-05-21 21:07           ` Thomas Gleixner

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