From: David Laight <david.laight.linux@gmail.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Marco Elver <elver@google.com>, Thomas Gleixner <tglx@kernel.org>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86: Implement _THIS_IP_ using inline asm for 32-bit
Date: Thu, 21 May 2026 11:27:13 +0100 [thread overview]
Message-ID: <20260521112713.0f32beba@pumpkin> (raw)
In-Reply-To: <20260521070801.GE3126523@noisy.programming.kicks-ass.net>
On Thu, 21 May 2026 09:08:01 +0200
Peter Zijlstra <peterz@infradead.org> wrote:
> On Thu, May 21, 2026 at 02:00:09AM +0200, Marco Elver wrote:
..
> > #ifdef CONFIG_X86_32
> > #define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))
> > +#define _THIS_IP_ ({ unsigned long __ip; asm volatile("call 1f\n1: pop %0" : "=r" (__ip)); __ip; })
>
> This will mess up the RSB and cause bad performance ripple effects for a
> bit each use. Now, I don't think anybody still cares about performance
> on 32bit (I certainly don't), so perhaps this is fine. But urgh.
Nope, the cpu understands that code sequence and doesn't mess up the RSB.
It might even get decoded to a single u-op.
Basically it is present at the start of pretty much every PIC function.
-- David
prev parent reply other threads:[~2026-05-21 10:27 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-21 0:00 [PATCH] x86: Implement _THIS_IP_ using inline asm for 32-bit Marco Elver
2026-05-21 7:08 ` Peter Zijlstra
2026-05-21 8:34 ` Marco Elver
2026-05-21 8:54 ` Peter Zijlstra
2026-05-21 9:55 ` H. Peter Anvin
2026-05-21 10:20 ` Peter Zijlstra
2026-05-21 11:45 ` Marco Elver
2026-05-21 10:27 ` David Laight [this message]
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