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([2001:926:3:e0:b673:38ac:c711:a9f5]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36a7263179bsm14177558a91.1.2026.05.27.01.21.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 01:21:29 -0700 (PDT) From: Peng Yang X-Google-Original-From: Peng Yang To: Mark Brown Cc: Serge Semin , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, pyangyyd@gmail.com Subject: Re: [PATCH] spi: dw: fix race between transfer IRQ handler and timeout handler Date: Wed, 27 May 2026 16:20:42 +0800 Message-ID: <20260527082042.3746-1-pyangyyd@amazon.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: <20260522095727.18307-1-pyangyyd@amazon.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On Mon, May 26, 2026 at ..., Mark Brown wrote: > Please don't top post, reply in line with needed context. Apologies for the format, fixing it here. > Please fix your mail client to word wrap within paragraphs at > something substantially less than 80 columns. Will do. > That doesn't mean that's the only possible thing that could race. I've traced through the code paths during my debug. The only race path is in IRQ mode, where handle_err() calls dw_spi_reset_chip() from the SPI core kthread while the IRQ handler is still servicing FIFO interrupts on another CPU. Poll mode returns 0 so the kthread never sleeps and handle_err can't be reached concurrently. DMA mode has its own transfer handler that doesn't access the FIFO directly. > What happens if between checking the interrupt status and > handling the FIFOs we call dw_spi_handle_err()? The next > transfer could be started, updating the buffer pointers and > lengths in dw_spi_transfer_one() but that doesn't exclude > the interrupt handler. Looking at spi_transfer_one_message(), handle_err() and the next transfer_one() are called sequentially from the same kthread: transfer_one() -> spi_transfer_wait() -> timeout -> handle_err() -> spi_finalize_current_message() -> next transfer_one() A new transfer cannot start until handle_err() returns and spi_finalize_current_message() completes, so buffer pointers won't be updated concurrently. If reset happens between checking irq_status and taking the lock, dw_reader/dw_writer will see an empty FIFO (max=0) and exit without accessing DR. > That's also already an issue, but it's complicated by the > thin locking windows. I think this case is safe because the kthread serializes handle_err and the next transfer_one sequentially, so the buffer pointers can't be updated while the IRQ handler is still running. Please let me know if I'm missing something here. Best Regards, Peng Yang