From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-dl1-f50.google.com (mail-dl1-f50.google.com [74.125.82.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0D6430C359 for ; Thu, 28 May 2026 03:22:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.82.50 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779938581; cv=none; b=aGFR4+U9SH8ShGdmBT570DZBfugYlDV8LtN+uQJwS0pIEgjt/w8jrqGWKJuG2YugbLM0r3wOtBujGKTwkqF0BihhExebqLDXU3A8Q/tU8QbXvQPzuXMcG7rNpLQdyQHSNn/fk1FDz4Q1z2SNlfKDUaLRoCC72KS57BKungd0Xsk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779938581; c=relaxed/simple; bh=Jvfk7gaLUjWx7ArQLFOHYObsLwYlIgAWiOPOiuDioAA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=r+Cwqpr6sdF67qDvPYlTv0zSQylEdSrBV/wel3ixsB+TeKUrbXKUtSseD0QXpjiSebkNIkJwKKd/ZuRLShdncLUhWj9Kl/oaAmmavwH8LitdVib+Wfql8qmUF8XIpAlk6vD2tCfH7k6CyHs8bPadE8taFCXNeP9qL0ge0nRUj3o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=AcVKD3cy; arc=none smtp.client-ip=74.125.82.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="AcVKD3cy" Received: by mail-dl1-f50.google.com with SMTP id a92af1059eb24-1353c2f35cfso3309282c88.1 for ; Wed, 27 May 2026 20:22:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779938577; x=1780543377; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FGJ1VhqmwIMs22XCOQT4AiP80fa6L3cM+BSo0I/Hwjk=; b=AcVKD3cylQrZqcygaknv7iPA7Hp1DT230/lLt8efshtmq9o7Jmzj7fzc9QCLrqtlbF FB3Ql6KkfIIsYqRQdLouz+4ml7cApkpCPj4Vmr48yLGlOs8OBo01FtZBfx2vqCG5TV4n xFs43LjxMJ/PRZrJhLkMnNxYS3HQ6dCe4y4JgheVaIMBb5DBy7e/Niza3hqrkVH+INWr 5Xr9obR3Pj27+Crndjoy7Ximtv3wegJj8v4N6yVus1CUqMx83MOx/997TiY2zm9pmRkk TKyAucg3QbruJLucDV+bt5GovHAZCWm4U7DNagYQcxr2kMxO7WiOd9M7o9oGQXLrwadt DIew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779938577; x=1780543377; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=FGJ1VhqmwIMs22XCOQT4AiP80fa6L3cM+BSo0I/Hwjk=; b=HoHRmkDmhyl1KPMhHDMWxdajCo1ffNu7RX7SaQbopTcOXj75TCOMo6HM3JyGxv/WU9 RXUmrCnJrDpxY30u8Br88E6YgesW5/z89qkm9QAOj7N2vvFpZHH17dzg9YTQPC3SBVrF +h/lDB+HYfUnFnTwYEd7AEc2KdxS/OJ6AMWvUS6JtY/LiuIiNyjVp7ZwBP8xboGRlFTW hp6UPhzJDJQlzXjzRYZlr91iU8/cwNC3hm5bREZN7+t+nU1QBXJdCGAM3Svh1L1f0sIt 1pj67epF7O11U4EtxMpiIf8/B2RYXSbkLwRIqywsC/p9k6Kv4yxBUzGbKwdqUqgJ49sn oImQ== X-Forwarded-Encrypted: i=1; AFNElJ+E6NV/Q8EOOzvP02aEPYkvQlI7byn0sUpTTTeSwURoAzsMQgaI5SwezWOPy37AHtKpEmBhQmclUrKBEo4=@vger.kernel.org X-Gm-Message-State: AOJu0YzcKdCijbGsk+u8lfgiNeSkcGRopZaRv3dJHHDNtC/jvQug0hav PStQ3dDuwTl1r7w86su0b/5UQtXpaHX318x4wzAxmEj+HLCzHfWrtLCYmH9lqtKi X-Gm-Gg: Acq92OEwbDpbsvWKcu98JdKIaSjg4QtisqORXTQCZ7A02QPacbXrsYI77uNqOSYKy5i k9+QFcOtv1XkR/uy0KHF1NDwVpfByKw5iVcykmDs0vl3Y2l0so9NejOYEJoWA6PuX9sfkEVbK6y grBi1gehhP9F36Mj8oQB/PCC4PD3QBluEFnHod8Ef/hm1ACH+T9UtwJqaFKUKBI3DCgaW9YhHU3 YjLnDwgBWdm6NGEJy16EHhot8rJ2r14j9/fOQ/bnHTMOssJfLDhYeMbRHMJ7OahUPUOmKk5Bkez nkL/Y2GrWBXq0J5laL0SEKBN30hGkwC4lj1s3UyXNzbaSM1zXv+8rYCF1OUUDivFEa3wWhL0w+T n5HYooH99dy7sng1VI7h2haBk1zm7oMwaaSAU+mkrojXP7VMgvp4y27UV69J84VsVugnJkXGb4Q 95QoxANmJYbvEJx+5T6fkvnHM/3dgqpl/1kxuMc2XjPskPcLX0BAi+fXphiSQ= X-Received: by 2002:a05:7022:6892:b0:12d:b7bb:4f54 with SMTP id a92af1059eb24-1365f810e21mr11285738c88.3.1779938576838; Wed, 27 May 2026 20:22:56 -0700 (PDT) Received: from ewan-server.tailb932da.ts.net ([154.26.185.247]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1366aa88c7esm11650007c88.10.2026.05.27.20.22.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 20:22:56 -0700 (PDT) From: Ewan Hai To: seanjc@google.com, pbonzini@redhat.com, tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: binbin.wu@linux.intel.com, ewanhai@zhaoxin.com, cobechen@zhaoxin.com, tonywwang@zhaoxin.com Subject: [PATCH v2 5/5] KVM: x86: Expose Zhaoxin RSA CPUID feature Date: Thu, 28 May 2026 11:22:34 +0800 Message-Id: <20260528032234.1322565-6-ewandevelop@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260528032234.1322565-1-ewandevelop@gmail.com> References: <20260528032234.1322565-1-ewandevelop@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Advertise the Zhaoxin big-number arithmetic engine to guests via CPUID 0xC0000001 EDX bits 27 (RSA) and 28 (RSA_EN). The RSA feature provides two user-mode instructions for modular arithmetic on big integers, documented in the Zhaoxin PadLock Instruction Reference, chapter 4 ("Modular Multiplication and Exponentiation Engine"). Both support operand sizes from 256 to 32768 bits (in 128-bit increments): - REP XMODEXP (encoding F3 0F A6 F8, subsection 4.1) computes A^B mod M - REP MONTMUL2 (encoding F3 0F A6 F0, subsection 4.2) computes A*B mod M REP MONTMUL2 is the long-mode replacement of legacy REP MONTMUL, which is restricted to compatibility and 32-bit protected modes. These primitives accelerate RSA and related public-key operations. Both instructions are unprivileged (no CPL restriction) and available in all CPU modes, with no associated MSR control. The RSA and RSA_EN bits are redundant by hardware design (set or cleared together) and both serve purely as CPUID-level feature-presence reporting flags requiring no KVM emulation. Both bits are advertised because different software may probe either one when checking for RSA availability. Signed-off-by: Ewan Hai --- arch/x86/include/asm/cpufeatures.h | 2 ++ arch/x86/kvm/cpuid.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 3702d7a30ae6..a769c83588f7 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -154,6 +154,8 @@ #define X86_FEATURE_RNG2_EN ( 5*32+23) /* "rng2_en" RNG2 enabled */ #define X86_FEATURE_PHE2 ( 5*32+25) /* "phe2" PadLock Hash Engine v2 */ #define X86_FEATURE_PHE2_EN ( 5*32+26) /* "phe2_en" PHE2 enabled */ +#define X86_FEATURE_RSA ( 5*32+27) /* "rsa" Big-number arithmetic */ +#define X86_FEATURE_RSA_EN ( 5*32+28) /* "rsa_en" RSA enabled */ /* More extended AMD flags: CPUID level 0x80000001, ECX, word 6 */ #define X86_FEATURE_LAHF_LM ( 6*32+ 0) /* "lahf_lm" LAHF/SAHF in long mode */ diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 3fb81f7a6107..94ea9abae566 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -1290,6 +1290,8 @@ void kvm_initialize_cpu_caps(void) F(RNG2_EN), F(PHE2), F(PHE2_EN), + F(RSA), + F(RSA_EN), ); /* -- 2.34.1