From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BCEEF22576E for ; Thu, 28 May 2026 15:26:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981997; cv=none; b=rBfQ+1PtL0ITPFHfDGeIU76gMWhIAdb1Fs9On1fcuofw8RVeN1S/TndPJ0rxFT7aeJvLer2+K5NRMdUsmfcwXSixjc1C8lHUk/5xrGlMfZ1UcF7IHTzuDa/lUQj2qQ4tjNLtzqGcwV57Ssc0wtKncHlJSg0AtIiefAhYvsxR6mg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981997; c=relaxed/simple; bh=s8GW/mZeIt7JoDJi9/DETg9JzUkQsLsTjYO7AoaS/fA=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=eqaF03GL7/i+oocVj6fOZjc8ntdhN3bkd2NYmp9UwN11DI5ZTHK1oIZa4bqYpF8VelMR/bcLM5SqHnmLZL8WAXl55wP9nOryBiFh5H82tmJxADvrQPTpKKEbuv+QISYglh/ZjyNY7tLE6q/jGjRwiHn6f/3cMWaIq7WeXdkqW/I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=iBZDuQiO; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="iBZDuQiO" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F61B22D9; Thu, 28 May 2026 08:26:31 -0700 (PDT) Received: from localhost (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E637D3F632; Thu, 28 May 2026 08:26:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1779981996; bh=s8GW/mZeIt7JoDJi9/DETg9JzUkQsLsTjYO7AoaS/fA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=iBZDuQiOd4TFPNS6veuwmzzlPvcrWMGV9xmW7VHmtU6kLaWxrpeEGTZ9A+fprlv/p hcxeHgPmvw+TrsPCeC6EY5XYqa2LwDd3WMShH2oJa+fHtZ20OVpXgHBo4SSGmOcLuM DES29bVTW83M/tUdaH2RmSaN3FXQe56pDT298+8Q= Date: Thu, 28 May 2026 16:26:33 +0100 From: Leo Yan To: Yeoreum Yun Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, suzuki.poulose@arm.com, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, jie.gan@oss.qualcomm.com Subject: Re: [PATCH v7 09/13] coresight: etm4x: missing cscfg_csdev_disable_active_config() in perf enable Message-ID: <20260528152633.GH101133@e132581.arm.com> References: <20260519154812.254884-1-yeoreum.yun@arm.com> <20260519154812.254884-10-yeoreum.yun@arm.com> <20260528143358.GF101133@e132581.arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, May 28, 2026 at 03:43:40PM +0100, Yeoreum Yun wrote: [...] > > @@ -931,6 +919,18 @@ static int etm4_enable_perf(struct coresight_device *csdev, > > if (ret) > > goto err; > > > > + /* > > + * Set any selected configuration and preset. A zero configid means no > > + * configuration active, preset = 0 means no preset selected. > > + */ > > + cfg_hash = ATTR_CFG_GET_FLD(attr, configid); > > + if (cfg_hash) { > > + preset = ATTR_CFG_GET_FLD(attr, preset); > > + ret = cscfg_csdev_enable_active_config(csdev, cfg_hash, preset); > > + if (ret) > > + goto err; > > + } > > + > No. since preset overrides the "perf configuratoin" formerly but > this code makes it vice versa. The above proposed change applies cfgfs after calling etm4_parse_event_config(). This is just use preset to override the config. Do I miss anything? > Also, cfg_hash and prest is also part of > etm4_parse_event_config(), and it doesn't seem to good to separate > cfgfs handling from that function. > > IMHO, It would be better to keep this as it is. I have another version to give a try. I'd leave to you and maintainers to choose which is better. diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 0889937811cb..471824234800 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -882,16 +882,6 @@ static int etm4_parse_event_config(struct coresight_device *csdev, /* bit[12], Return stack enable bit */ config->cfg |= TRCCONFIGR_RS; - /* - * Set any selected configuration and preset. A zero configid means no - * configuration active, preset = 0 means no preset selected. - */ - cfg_hash = ATTR_CFG_GET_FLD(attr, configid); - if (cfg_hash) { - preset = ATTR_CFG_GET_FLD(attr, preset); - ret = cscfg_csdev_enable_active_config(csdev, cfg_hash, preset); - } - /* branch broadcast - enable if selected and supported */ if (ATTR_CFG_GET_FLD(attr, branch_broadcast)) { if (!caps->trcbb) { @@ -899,8 +889,6 @@ static int etm4_parse_event_config(struct coresight_device *csdev, * Missing BB support could cause silent decode errors * so fail to open if it's not supported. */ - if (cfg_hash) - cscfg_csdev_disable_active_config(csdev); ret = -EINVAL; goto out; } else { @@ -908,10 +896,31 @@ static int etm4_parse_event_config(struct coresight_device *csdev, } } + /* + * Set any selected configuration and preset. A zero configid means no + * configuration active, preset = 0 means no preset selected. + */ + cfg_hash = ATTR_CFG_GET_FLD(attr, configid); + if (cfg_hash) { + preset = ATTR_CFG_GET_FLD(attr, preset); + ret = cscfg_csdev_enable_active_config(csdev, cfg_hash, preset); + } + out: return ret; } +static void etm4_clean_event_config(struct coresight_device *csdev, + struct perf_event *event) +{ + struct perf_event_attr *attr = &event->attr; + unsigned long cfg_hash; + + cfg_hash = ATTR_CFG_GET_FLD(attr, configid); + if (cfg_hash) + cscfg_csdev_disable_active_config(csdev); +} + static int etm4_enable_perf(struct coresight_device *csdev, struct perf_event *event, struct coresight_path *path) @@ -938,15 +947,14 @@ static int etm4_enable_perf(struct coresight_device *csdev, /* And enable it */ ret = etm4_enable_hw(drvdata); - if (ret) { - if (ATTR_CFG_GET_FLD(attr, configid)) - cscfg_csdev_disable_active_config(csdev); - goto err; - } + if (ret) + goto err_hw; csdev->path = path; return 0; +err_hw: + etm4_clean_event_config(csdev, event); err: /* Failed to start tracer; roll back to DISABLED mode */ coresight_set_mode(csdev, CS_MODE_DISABLED);