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[47.54.130.67]) by smtp.gmail.com with ESMTPSA id af79cd13be357-91530135f92sm52883085a.47.2026.05.28.17.59.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2026 17:59:34 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1wSlZV-0000000HBjx-3ea1; Thu, 28 May 2026 21:59:33 -0300 Date: Thu, 28 May 2026 21:59:33 -0300 From: Jason Gunthorpe To: Ashish Mhetre Cc: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, nicolinc@nvidia.com, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: Re: [PATCH 2/2] iommu/arm-smmu-v3: Issue CFGI/TLBI twice on Tegra264 Message-ID: <20260529005933.GQ2487554@ziepe.ca> References: <20260528101617.4068249-1-amhetre@nvidia.com> <20260528101617.4068249-3-amhetre@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260528101617.4068249-3-amhetre@nvidia.com> On Thu, May 28, 2026 at 10:16:17AM +0000, Ashish Mhetre wrote: > Apply the workaround for Tegra264 erratum by issuing every CFGI/TLBI > command twice on affected SMMU instances, with CMD_SYNC after each. > The erratum requires this exact sequencing: > > TLBI/CFGI ... CMD_SYNC TLBI/CFGI ... CMD_SYNC > > To get this sequence with minimal surgery, hook the workaround into > arm_smmu_cmdq_issue_cmdlist(). Rename the original function to > __arm_smmu_cmdq_issue_cmdlist() and add a thin wrapper that, on > affected SMMUs and when @sync is true, re-issues the same cmdlist a > second time. > > A new arm_smmu_cmd_needs_tlbi_twice() helper classifies which opcodes > need the doubling: CFGI_* and TLBI_*. > > For batches that exceed CMDQ_BATCH_ENTRIES commands, > arm_smmu_cmdq_batch_add_cmd_p() normally flushes the full buffer with > sync=false, deferring the SYNC to the eventual batch_submit(). On > affected SMMUs this would leave the first chunk's commands issued > only once, since the WAR hook in arm_smmu_cmdq_issue_cmdlist() only > fires on synced submissions. Force a SYNC on the capacity rollover > when the buffer carries CFGI/TLBI commands so every flushed chunk is > correctly doubled. > > Signed-off-by: Ashish Mhetre > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 66 +++++++++++++++++++-- > 1 file changed, 61 insertions(+), 5 deletions(-) Reviewed-by: Jason Gunthorpe Jason