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From: Jason Gunthorpe <jgg@nvidia.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
	joro@8bytes.org, yi.l.liu@intel.com, kevin.tian@intel.com,
	nicolinc@nvidia.com, vasant.hegde@amd.com, jon.grimm@amd.com,
	santosh.shukla@amd.com, sairaj.arunkodilkar@amd.com,
	jay.chen@amd.com, wvw@google.com, wnliu@google.com,
	dantuluris@google.com, chriscli@google.com, kpsingh@google.com
Subject: Re: [PATCH v2 11/26] iommu/amd: Allocate and map vIOMMU private regions
Date: Mon, 1 Jun 2026 10:05:41 -0300	[thread overview]
Message-ID: <20260601130541.GL3195266@nvidia.com> (raw)
In-Reply-To: <20260528051738.596013-12-suravee.suthikulpanit@amd.com>

On Thu, May 28, 2026 at 05:17:23AM +0000, Suravee Suthikulpanit wrote:

> --- a/drivers/iommu/amd/viommu.c
> +++ b/drivers/iommu/amd/viommu.c
> @@ -131,8 +131,66 @@ static int __init viommu_vf_vfcntl_init(struct amd_iommu *iommu)
>  	return -ENOMEM;
>  }
>  
> +static void *alloc_private_subregion(struct amd_iommu *iommu, u64 base, size_t size)
> +{
> +	int ret;
> +	void *region;
> +	int nid = iommu && iommu->dev ? dev_to_node(&iommu->dev->dev) : NUMA_NO_NODE;
> +
> +	region = (void *)iommu_alloc_pages_node_sz(nid, GFP_KERNEL | __GFP_ZERO, size);
> +	if (!region)
> +		return NULL;
> +
> +	ret = set_memory_uc((unsigned long)region, size >> PAGE_SHIFT);
> +	if (ret)
> +		goto err_out;

Why?

> +	ret = iommu_map(&iommu->viommu_pdom->domain, base,
> +			iommu_virt_to_phys(region), size,
> +			IOMMU_PROT_IR | IOMMU_PROT_IW, GFP_KERNEL);
> +
> +	if (ret)
> +		goto cleanup_mem_attr;
> +
> +	pr_debug("%s: base=%#llx, size=%#lx, subregion=%#llx(%#llx)\n",
> +		 __func__, base, size, (unsigned long long)region, iommu_virt_to_phys(region));
> +
> +	amd_iommu_flush_private_vm_region(iommu, iommu->viommu_pdom, base, size);

Why? Is there suddenly negative caching for this mode?

> +	return region;
> +cleanup_mem_attr:
> +	set_memory_wb((unsigned long)region, size >> PAGE_SHIFT);
> +err_out:
> +	iommu_free_pages(region);
> +	return NULL;
> +}
> +
> +static void viommu_private_space_uninit(struct amd_iommu *iommu)
> +{
> +	int i;
> +	struct iommu_domain *dom;
> +
> +	if (!iommu->viommu_pdom)
> +		return;
> +
> +	for (i = 0; i < VIOMMU_PRIV_SUBREGION_CNT; i++) {
> +		if (!iommu->viommu_priv_region[i])
> +			continue;
> +		set_memory_wb((unsigned long)iommu->viommu_priv_region[i],
> +			      VIOMMU_PRIV_SUBREGION_SIZE >> PAGE_SHIFT);
> +		iommu_free_pages(iommu->viommu_priv_region[i]);
> +		iommu->viommu_priv_region[i] = NULL;
> +	}
> +
> +	dom = &iommu->viommu_pdom->domain;
> +	amd_iommu_domain_free(dom);
> +	iommu->viommu_pdom = NULL;
> +}

Shouldn't something flush the DID before freeing the domain?

>  static int viommu_private_space_init(struct amd_iommu *iommu)
>  {
> +	int i;
> +	u64 base;
>  	struct iommu_domain *dom;
>  	struct protection_domain *pdom;
>  	struct pt_iommu_amdv1_hw_info pt_info;
> @@ -144,22 +202,33 @@ static int viommu_private_space_init(struct amd_iommu *iommu)
>  	dom = amd_iommu_domain_alloc_paging_v1(&iommu->dev->dev, 0);
>  	if (!dom) {
>  		pr_err("%s: Failed to initialize private space\n", __func__);
> -		goto err_out;
> +		return -ENOMEM;
>  	}
>  
>  	pdom = to_pdomain(dom);
>  	iommu->viommu_pdom = pdom;
>  
> +	/*
> +	 * Each private region requires to 8MB of memory to be allocated
> +	 * and mapped. Split the region into 4 x 2MB-subregion.
> +	 */
> +	for (i = 0; i < VIOMMU_PRIV_SUBREGION_CNT; i++) {
> +		base = VIOMMU_PRIV_REGION_BASE + (i * VIOMMU_PRIV_SUBREGION_SIZE);
> +		iommu->viommu_priv_region[i] = alloc_private_subregion(iommu, base,
> +								       VIOMMU_PRIV_SUBREGION_SIZE);
> +		if (!iommu->viommu_priv_region[i]) {
> +			pr_err("%s: Failed to allocate vIOMMU private subregion %d\n", __func__, i);
> +			viommu_private_space_uninit(iommu);
> +			return -ENOMEM;
> +		}
> +	}
> +
>  	pt_iommu_amdv1_hw_info(&pdom->amdv1, &pt_info);
>  	pr_debug("%s: devid=%#x, pte_root=%#llx\n",
>  		 __func__, iommu->devid,
>  		 (unsigned long long)pt_info.host_pt_root);
>  
>  	return 0;
> -err_out:
> -	if (dom)
> -		amd_iommu_domain_free(dom);
> -	return -ENOMEM;

Why is the error handling being deleted now? You should organize your
patches to avoid churn like this.

Jason

  reply	other threads:[~2026-06-01 13:07 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-28  5:17 [PATCH v2 00/26] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 01/26] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 02/26] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 03/26] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-06-01 12:43   ` Jason Gunthorpe
2026-06-05  8:45     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 04/26] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-06-01 12:44   ` Jason Gunthorpe
2026-06-05  8:55     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 05/26] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 06/26] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 07/26] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-06-01 12:51   ` Jason Gunthorpe
2026-05-28  5:17 ` [PATCH v2 08/26] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 09/26] iommu/amd: Introduce domain for IOMMU Private Address (IPA) region Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 10/26] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-06-01 12:59   ` Jason Gunthorpe
2026-05-28  5:17 ` [PATCH v2 11/26] iommu/amd: Allocate and map vIOMMU private regions Suravee Suthikulpanit
2026-06-01 13:05   ` Jason Gunthorpe [this message]
2026-05-28  5:17 ` [PATCH v2 12/26] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-05-30 20:44   ` Weinan Liu
2026-06-01 13:08   ` Jason Gunthorpe
2026-06-01 13:11   ` Jason Gunthorpe
2026-06-01 18:16   ` Weinan Liu
2026-05-28  5:17 ` [PATCH v2 13/26] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-05-30 21:26   ` Weinan Liu
2026-05-28  5:17 ` [PATCH v2 14/26] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 15/26] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 16/26] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 17/26] iommu/amd: Pass KVM FD from userspace when initializing vIOMMU Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 18/26] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-06-01 13:31   ` Jason Gunthorpe
2026-05-28  5:17 ` [PATCH v2 19/26] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 20/26] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 21/26] iommu/amd: Map kvmfd to shared translate device ID for vIOMMU Suravee Suthikulpanit
2026-06-01 13:35   ` Jason Gunthorpe
2026-05-28  5:17 ` [PATCH v2 22/26] iommufd: Add hw_queue_init and split queue alloc paths Suravee Suthikulpanit
2026-05-29  0:14   ` Nicolin Chen
2026-06-03  0:30     ` Suthikulpanit, Suravee
2026-06-01 13:38   ` Jason Gunthorpe
2026-05-28  5:17 ` [PATCH v2 23/26] iommu/amd: Add support for vIOMMU HW queues initialization Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 24/26] iommufd: Introduce vIOMMU command via VIOMMU_COMMAND ioctl Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 25/26] iommu/amd: Handle set/get command for AMD vIOMMU Suravee Suthikulpanit
2026-05-29 23:20   ` Nicolin Chen
2026-06-03  3:53     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 26/26] iommu/amd: Introduce logic to check and enable vIOMMU feature Suravee Suthikulpanit
2026-06-01 13:30 ` [PATCH v2 00/26] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Jason Gunthorpe
2026-06-03  4:13   ` Suthikulpanit, Suravee
2026-06-03  6:41   ` Suthikulpanit, Suravee
2026-06-03 12:13     ` Jason Gunthorpe
2026-06-05  8:41     ` Suthikulpanit, Suravee

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