From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AAF6F3ABD90 for ; Tue, 2 Jun 2026 09:09:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780391386; cv=none; b=JaV1FV/OSKHIFduofkk7J59SOAxhEDy9j6sgNMyUPYdgtAwY3O2TRyuAWg8fGDyuD+GxLigKi4fiqyUxbtcLCFEmpR4hBVyllu0WII9MeUpkKaxjYcAC4NPCa3pLVXECrmp30y21At/DyxFNFq/WazhRgu7qPSljxbDJp7cryLg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780391386; c=relaxed/simple; bh=rwrWF3uAi9AqpGqKzDs6TrPfPEdF1XXZC7VjT9ldrOA=; h=Date:Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type; b=qUQlV5WIQjamHNIDEC0VV3gan7ZCIpMciAbAyJMaQ5TjUfDF++Lw9bsmkTpJcKNl5en9nF55Pm+fTkSTSvB/X6MbzF99ktQFSrqCvwvzMLAzk9xfkxCyi7TFy3R4QX4dAB7YixMHkkPVve9lEse5kCy27SvI7qQVGxHCk/HJHpw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jlawaA2+; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jlawaA2+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C87D11F00899; Tue, 2 Jun 2026 09:09:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780391385; bh=txfUALRdh4x+29Dy1o1HPnfNCogsd7AzeTfu6cWp97o=; h=Date:From:To:Cc:Subject:References; b=jlawaA2+eDFZa7XjAO3nSywFVyuGe+/yNfsTWpvs5dlEpRExcGmrJjfR3VGz4kbpm KsLxZlSfDjmSLjZytkEolZcy5WMNjvxeFGt2zezRRqQWmBbhQifDZPuO5eCz3AFnGd td3lLEGljJO/0FsMJ8etP/lncDDbMgXWuLLEdWipbQVz8dcn3qGZRPOHk6vYJKJDBd +KzEduUwQ/Vtf66tSWy/ufjbiRqPUaE+4qeov5EpkLfcT1jEPRkOZBgI/TWBlom1Uw ILH35LQR5IJ/L6RWkVre6cGotIzJcqcvv+cAg5XruxYQ6cc0pp7orDDuDY9445Qu+s /SD1Y0eXG4N+Q== Date: Tue, 02 Jun 2026 11:09:42 +0200 Message-ID: <20260602090535.513181528@kernel.org> User-Agent: quilt/0.69 From: Thomas Gleixner To: LKML Cc: Mathieu Desnoyers , =?UTF-8?q?Andr=C3=A9=20Almeida?= , Sebastian Andrzej Siewior , Carlos O'Donell , Peter Zijlstra , Florian Weimer , Rich Felker , Torvald Riegel , Darren Hart , Ingo Molnar , Davidlohr Bueso , Arnd Bergmann , "Liam R . Howlett" , Uros Bizjak , =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= , Mark Brown , Richard Weinberger Subject: [patch V5 06/16] uaccess: Provide unsafe_atomic_store_release_user() References: <20260602084648.462672743@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 The upcoming support for unlocking robust futexes in the kernel requires store release semantics. Syscalls do not imply memory ordering on all architectures so the unlock operation requires a barrier. This barrier can be avoided when stores imply release like on x86. Provide a generic version with a smp_mb() before the unsafe_put_user(), which can be overridden by architectures. Provide also a ARCH_MEMORY_ORDER_TSO Kconfig option, which can be selected by architectures with Total Store Order (TSO), where store implies release, so that the smp_mb() in the generic implementation can be avoided. If that is set a barrier() is used instead of smp_mb(), which is not required for the use case at hand, but makes it future proof for other usage to prevent the compiler from reordering. Signed-off-by: Thomas Gleixner Reviewed-by: André Almeida --- V4: Rename it really .... Add a barrier when TSO=y V3: Rename to CONFIG_ARCH_MEMORY_ORDER_TSO - Peter V2: New patch --- arch/Kconfig | 4 ++++ include/linux/uaccess.h | 11 +++++++++++ 2 files changed, 15 insertions(+) --- a/arch/Kconfig +++ b/arch/Kconfig @@ -403,6 +403,10 @@ config ARCH_32BIT_OFF_T config ARCH_32BIT_USTAT_F_TINODE bool +# Selected by architectures with Total Store Order (TSO) +config ARCH_MEMORY_ORDER_TSO + bool + config HAVE_ASM_MODVERSIONS bool help --- a/include/linux/uaccess.h +++ b/include/linux/uaccess.h @@ -649,6 +649,17 @@ static inline void user_access_restore(u #define user_read_access_end user_access_end #endif +#ifndef unsafe_atomic_store_release_user +# define unsafe_atomic_store_release_user(val, uptr, elbl) \ + do { \ + if (!IS_ENABLED(CONFIG_ARCH_MEMORY_ORDER_TSO)) \ + smp_mb(); \ + else \ + barrier(); \ + unsafe_put_user(val, uptr, elbl); \ + } while (0) +#endif + /* Define RW variant so the below _mode macro expansion works */ #define masked_user_rw_access_begin(u) masked_user_access_begin(u) #define user_rw_access_begin(u, s) user_access_begin(u, s)