From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D412743D4EA for ; Wed, 3 Jun 2026 09:08:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780477718; cv=none; b=DqMzYQPHELYmGEOF0KHff4XyKaV5EplNcMs89SsOGCCIdK9TKZxm6aS7qjpRlb/GYpR4jhK7OL14UChithe2PHOhYA2vNL3Z4mvO6xRjIvM90itvjM9elsTiW/TJzKYXL4WvHD//V8UwlwHBHNmtTuW4XwCBGLySEgn1XQLd664= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780477718; c=relaxed/simple; bh=a+HV4otQQnfg70YbgVKjl7GYJ2TmpuPTytvG8ieMQus=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IwINZ4iH+lGCuksxKV082mDoiuSx3ZhEkReVlYdb655mbxP6otGPySMAJZiDHCMIzrd7d2KkAJifmbp6vaH0vWNSOqoDwshvPIbW8oo3x5S/RI2M4QRogMup+BVjHkg77XY+FpJXw4jm/PCVkEiwBO731naeGaBukuJ4/ganbQc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jJ/Iur/+; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jJ/Iur/+" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780477717; x=1812013717; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=a+HV4otQQnfg70YbgVKjl7GYJ2TmpuPTytvG8ieMQus=; b=jJ/Iur/+qtqQ5dEfQ6CxMyH+5wgsRg/KlC/GeE7c21NH5Dr5tdapTgU/ AvwDEBaXSqsrMnSFVlAjfkQTCTkHLTzpW7O5cUy+WjQTcP2r+FmzbjLwF by2yhptUqh1FCshZ/1LNWnrEXe6Tp4D1kGHZMepeIDxl/dYoqkwv5n1eg lhqDvLfhEwV1RHiXne5S4iN8y0q3nX3bm2w5AJTIdPD8aA6rQYB4TZ+OY gxQa1diPcJU0Wm8q3zpTzNtXAphQUUKKIYMTORRgO3PaVJYlGnZrf4ulA WeMruklIdxdPHUY84Dxu0FmRK3gw0n14qA1TsUQ3hAwVQV78DvtxviaaP A==; X-CSE-ConnectionGUID: jHh6AvBMQUSmGphO+8eR8A== X-CSE-MsgGUID: /j/YLwVaST2c7Yo3C3ewxw== X-IronPort-AV: E=McAfee;i="6800,10657,11805"; a="91852662" X-IronPort-AV: E=Sophos;i="6.24,184,1774335600"; d="scan'208";a="91852662" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jun 2026 02:08:36 -0700 X-CSE-ConnectionGUID: 2uX7maMRRc2TvsSTeqiFbA== X-CSE-MsgGUID: SOYuEsqKTqW7clNLPw/qpA== X-ExtLoop1: 1 Received: from ijarvine-mobl1.ger.corp.intel.com (HELO ahunter6-desk) ([10.245.244.137]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jun 2026 02:08:34 -0700 From: Adrian Hunter To: alexandre.belloni@bootlin.com Cc: Frank.Li@nxp.com, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V5 14/17] i3c: mipi-i3c-hci: Wait for NoOp commands to complete Date: Wed, 3 Jun 2026 12:07:51 +0300 Message-ID: <20260603090754.16252-15-adrian.hunter@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260603090754.16252-1-adrian.hunter@intel.com> References: <20260603090754.16252-1-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: 8bit When a transfer list is only partially completed due to an error, hci_dma_dequeue_xfer() overwrites the remaining DMA ring entries with NoOp commands and restarts the ring to flush them out. While NoOp commands are expected to complete successfully, they may still fail to complete if the DMA ring is stuck. Explicitly wait for the NoOp commands to finish, and trigger controller recovery if they do not complete or report an error. This ensures that partially completed transfer lists are reliably resolved and that a stuck ring is recovered promptly. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li --- Changes in V5: None Changes in V4: Add Frank's Rev'd-by Changes in V3: None Changes in V2: Rename completing_xfer to final_xfer Add missing reinit_completion() drivers/i3c/master/mipi-i3c-hci/dma.c | 39 ++++++++++++++++++++++----- 1 file changed, 33 insertions(+), 6 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c index f39a6ce2aad5..0fd56bbb84ef 100644 --- a/drivers/i3c/master/mipi-i3c-hci/dma.c +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c @@ -686,11 +686,33 @@ static void hci_dma_recovery(struct i3c_hci *hci) dev_err(&hci->master.dev, "Recovery %s\n", ret ? "failed!" : "done"); } +static bool hci_dma_wait_for_noop(struct i3c_hci *hci, struct hci_xfer *xfer_list, int n, + int noop_pos) +{ + struct completion *done = xfer_list->final_xfer->completion; + bool timeout = !wait_for_completion_timeout(done, HZ); + u32 error = timeout; + + for (int i = noop_pos; i < n && !error; i++) + error = RESP_STATUS(xfer_list[i].response); + + if (!error) + return true; + + if (timeout) + dev_err(&hci->master.dev, "NoOp timeout error\n"); + else + dev_err(&hci->master.dev, "NoOp error %u\n", error); + + return false; +} + static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer_list, int n) { struct hci_rings_data *rings = hci->io_data; struct hci_rh_data *rh = &rings->headers[xfer_list[0].ring_number]; + int noop_pos = -1; unsigned int i; bool did_unqueue = false; u32 ring_status; @@ -698,7 +720,7 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, guard(mutex)(&hci->control_mutex); spin_lock_irq(&hci->lock); - +restart: ring_status = rh_reg_read(RING_STATUS); if (ring_status & RING_STATUS_RUNNING) { /* @@ -757,11 +779,10 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, *ring_data++ = 0; } - /* disassociate this xfer struct */ - rh->src_xfers[idx] = NULL; - - /* and unmap it */ - hci_dma_unmap_xfer(hci, xfer, 1); + if (noop_pos < 0) { + reinit_completion(xfer->final_xfer->completion); + noop_pos = i; + } did_unqueue = true; } @@ -793,6 +814,12 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, wait_for_completion_timeout(&rh->op_done, HZ); + if (did_unqueue && !hci_dma_wait_for_noop(hci, xfer_list, n, noop_pos)) { + spin_lock_irq(&hci->lock); + hci->recovery_needed = true; + goto restart; + } + return did_unqueue; } -- 2.51.0