From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 529E843DA39 for ; Wed, 3 Jun 2026 09:08:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780477721; cv=none; b=Zm3SFmrK7pyyIXpuOKYbMM5Npn7oPAOm30E6IlXQUI2dII2M8fFc2i3tg5FxhdsEwXT8DvdLbL+j2fod4RD2fM0Cye5gnSDaO7fiaN9iIXmspS1BSxAeBZxGoWmtPy0Ka7mbadWxmVpqLfP7SdazMdDxo8Ez/rAOso5E+jKO4Cc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780477721; c=relaxed/simple; bh=SJo3309KexvrFf//nLbqMf1AExY0G6rtZtFHj0R9BIU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=J6b5vK5uWyItkNCnQ13novOUdcToLXa/rSjmW4hJCp2MI+v6qYlk6HV8z2yg+AjrYkJQ3r+rqWfmY1Br+f0pJuTNvxmDe1HPrCfFGCVl+Z4hEpY1lcCjb8jZb8gotJQD14O0jE19l2cQYUNjyyhUmWW6YoHQ1M3eZdgUl+bp5D8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=RB71bz3q; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="RB71bz3q" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780477720; x=1812013720; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SJo3309KexvrFf//nLbqMf1AExY0G6rtZtFHj0R9BIU=; b=RB71bz3qSL11BExDvvsTEjQcwxextWyR9noMMUUtueDne42SxeGXVyz7 qsfuBtLTXUIcKBd5NiX8G6zUAWCzg0yNZiwUyM615IfhfX3FDsRFn1wND DbUZFCeV67Xl8awNKQBb+U2CzMeJ/lpGBaUOqcHc01MR0cOHx+C8aZD70 dYjdZAYqbxwgq4aEIPoNqWzm1copM1sl5g8D9Smah5yWwqkNVOntLl+xD +vLIrF2mlIA8zDsDYqNQ+br9c3CUMWR8N6HMIBHlz+5jcy2Y/IpgM2fM2 o5L38CZQoUPDozZOwe63fup2fV/5ZVzLEQPAelZmGMacQH3gv0squz9Jq Q==; X-CSE-ConnectionGUID: 244E96WUQ/upOgLfEUNwdw== X-CSE-MsgGUID: 5WqfwIfAS9aWD9Q3TJzbjw== X-IronPort-AV: E=McAfee;i="6800,10657,11805"; a="91852672" X-IronPort-AV: E=Sophos;i="6.24,184,1774335600"; d="scan'208";a="91852672" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jun 2026 02:08:39 -0700 X-CSE-ConnectionGUID: rmRzx+hTSTmyL9vEMr/fyg== X-CSE-MsgGUID: xTvlwOGBSzq6EJYX3pJTVQ== X-ExtLoop1: 1 Received: from ijarvine-mobl1.ger.corp.intel.com (HELO ahunter6-desk) ([10.245.244.137]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jun 2026 02:08:38 -0700 From: Adrian Hunter To: alexandre.belloni@bootlin.com Cc: Frank.Li@nxp.com, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V5 16/17] i3c: mipi-i3c-hci: Consolidate DMA ring allocation Date: Wed, 3 Jun 2026 12:07:53 +0300 Message-ID: <20260603090754.16252-17-adrian.hunter@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260603090754.16252-1-adrian.hunter@intel.com> References: <20260603090754.16252-1-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: 8bit dma_alloc_coherent() allocates memory in whole pages, which can waste space when command and response queues are allocated separately. Allocate the DMA command and response queues from a single coherent allocation instead, while preserving the required 4-byte alignment. This reduces memory overhead without changing behavior. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li --- Changes in V5: Added Frank's Rev'd-by Changes in V4: Cache allocation size in rh->xfer_alloc_sz to avoid recomputing in hci_dma_free() Changes in V3: None Changes in V2: Check for failed allocation before assignments to avoid doing arithmetic with NULL pointers drivers/i3c/master/mipi-i3c-hci/dma.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c index 9a01c740760f..0136f3064ada 100644 --- a/drivers/i3c/master/mipi-i3c-hci/dma.c +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c @@ -130,7 +130,7 @@ struct hci_rh_data { dma_addr_t xfer_dma, resp_dma, ibi_status_dma, ibi_data_dma; unsigned int xfer_entries, ibi_status_entries, ibi_chunks_total; unsigned int xfer_struct_sz, resp_struct_sz, ibi_status_sz, ibi_chunk_sz; - unsigned int done_ptr, ibi_chunk_ptr, xfer_space; + unsigned int xfer_alloc_sz, done_ptr, ibi_chunk_ptr, xfer_space; struct hci_xfer **src_xfers; struct completion op_done; }; @@ -187,13 +187,7 @@ static void hci_dma_free(void *data) rh = &rings->headers[i]; if (rh->xfer) - dma_free_coherent(rings->sysdev, - rh->xfer_struct_sz * rh->xfer_entries, - rh->xfer, rh->xfer_dma); - if (rh->resp) - dma_free_coherent(rings->sysdev, - rh->resp_struct_sz * rh->xfer_entries, - rh->resp, rh->resp_dma); + dma_free_coherent(rings->sysdev, rh->xfer_alloc_sz, rh->xfer, rh->xfer_dma); kfree(rh->src_xfers); if (rh->ibi_status) dma_free_coherent(rings->sysdev, @@ -359,18 +353,19 @@ static int hci_dma_init(struct i3c_hci *hci) dev_dbg(&hci->master.dev, "xfer_struct_sz = %d, resp_struct_sz = %d", rh->xfer_struct_sz, rh->resp_struct_sz); - xfers_sz = rh->xfer_struct_sz * rh->xfer_entries; + xfers_sz = round_up(rh->xfer_struct_sz * rh->xfer_entries, 4); resps_sz = rh->resp_struct_sz * rh->xfer_entries; + rh->xfer_alloc_sz = xfers_sz + resps_sz; - rh->xfer = dma_alloc_coherent(rings->sysdev, xfers_sz, + rh->xfer = dma_alloc_coherent(rings->sysdev, rh->xfer_alloc_sz, &rh->xfer_dma, GFP_KERNEL); - rh->resp = dma_alloc_coherent(rings->sysdev, resps_sz, - &rh->resp_dma, GFP_KERNEL); rh->src_xfers = kzalloc_objs(*rh->src_xfers, rh->xfer_entries); ret = -ENOMEM; - if (!rh->xfer || !rh->resp || !rh->src_xfers) + if (!rh->xfer || !rh->src_xfers) goto err_out; + rh->resp = rh->xfer + xfers_sz; + rh->resp_dma = rh->xfer_dma + xfers_sz; /* IBIs */ -- 2.51.0