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[80.230.85.71]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4606f2b0d70sm46116268f8f.19.2026.06.16.09.15.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 09:15:43 -0700 (PDT) Date: Tue, 16 Jun 2026 12:15:38 -0400 From: "Michael S. Tsirkin" To: "David Hildenbrand (Arm)" Cc: Miaohe Lin , Zi Yan , Andrew Morton , linux-kernel@vger.kernel.org, Jason Wang , Xuan Zhuo , Eugenio =?iso-8859-1?Q?P=E9rez?= , Muchun Song , Oscar Salvador , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , Brendan Jackman , Johannes Weiner , Baolin Wang , Nico Pache , Ryan Roberts , Dev Jain , Barry Song , Lance Yang , Hugh Dickins , Matthew Brost , Joshua Hahn , Rakie Kim , Byungchul Park , Gregory Price , Ying Huang , Alistair Popple , Christoph Lameter , David Rientjes , Roman Gushchin , Harry Yoo , Axel Rasmussen , Yuanchu Xie , Wei Xu , Chris Li , Kairui Song , Kemeng Shi , Nhat Pham , Baoquan He , virtualization@lists.linux.dev, linux-mm@kvack.org, Andrea Arcangeli , Naoya Horiguchi Subject: Re: [PATCH splitout] mm: memory-failure: serialize TestSetPageHWPoison with zone->lock Message-ID: <20260616120114-mutt-send-email-mst@kernel.org> References: <20260610171646-mutt-send-email-mst@kernel.org> <14537566-94d9-eac5-2636-35f925a9d159@huawei.com> <20260611013644-mutt-send-email-mst@kernel.org> <1b5676ab-0dc5-ef33-9d79-a2bd6090a62d@huawei.com> <984d9775-e17c-0231-b021-126b13a9aa42@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, Jun 16, 2026 at 08:56:42AM +0200, David Hildenbrand (Arm) wrote: > >> > >> > >> Assume that we enlighten all non-atomics to grab the rcu read lock, such as > > > > These non-atomics are defined and used because they want to avoid atomic ops overhead? > > So I'm afraid using rcu read lock in these places would lead to unexpected overhead. > > It should be cheaper than atomics IIUC. Further, I assume that some pages could > batch over multiple such operations (esp. page freeing path when we process tail > pages). Doubt we have the energy to bother with this much. We'll have to stick them in the bit manipulation macros if memory failure is configured and be done with it. -- MST