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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4606f2e592csm64969272f8f.36.2026.06.18.03.22.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Jun 2026 03:22:58 -0700 (PDT) Date: Thu, 18 Jun 2026 11:22:56 +0100 From: David Laight To: Borislav Petkov Cc: Andrew Cooper , "H. Peter Anvin" , x86-ML , LKML Subject: Re: Save a WRMSR GS.base? Message-ID: <20260618112256.1ed7904b@pumpkin> In-Reply-To: <20260618010902.GAajNFLjwKOM-Cdj5l@fat_crate.local> References: <1E2599FB-0A39-4637-B042-EE36DA224264@zytor.com> <2f297456-d6c6-4cc8-95d8-2dac6bea99ec@citrix.com> <20260605171711.GAaiMEl_CahU4oHpMk@fat_crate.local> <079850DB-52FE-4545-825F-E01E918B085D@zytor.com> <20260608143835.GAaibT6_Ypd2OzVkWD@fat_crate.local> <87cfce38-4b5a-4014-a098-2c43e3067df1@zytor.com> <20260608200528.GDaicgiFydU8LVUGL2@fat_crate.local> <20260608212100.GEaicyPO65ii0InnFa@fat_crate.local> <20260618010902.GAajNFLjwKOM-Cdj5l@fat_crate.local> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 17 Jun 2026 18:09:02 -0700 Borislav Petkov wrote: > Ok, > > I think I incorporated them all: ... > +Btw, while running in kernel mode, MSR_KERNEL_GS_BASE contains actually the > +*user* GS.base. Thus, the naming can be confusing. Unless one thinks of it as > +the kernel's access to GS.base as MSRs are accessible only in CPL0. That last sentence doesn't read right. Maybe: The naming of MSR_KERNEL_GS_BASE is rather confusing. In can only be accessed in kernel mode where it normally contains the USER GS.base. The only time it contains the KERNEL GS.base is on system call/interrupt entry prior to swapgs being executed (and late in the return to user paths). As an aside I think a 32bit program can detect hardware interrupts. If %gs/%fs is loaded from an LDT and then the LDT entry changed (eg a different limit) then the new limit will be loaded by the ISR return path. I seem to remember deciding that it was impossible to actual restore the actual register value. David