From: "Kiryl Shutsemau (Meta)" <kas@kernel.org>
To: Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>
Cc: Jason Gunthorpe <jgg@nvidia.com>,
Nicolin Chen <nicolinc@nvidia.com>,
Pranjal Shrivastava <praan@google.com>,
Breno Leitao <leitao@debian.org>, Kyle McMartin <jkkm@meta.com>,
Usama Arif <usama.arif@linux.dev>,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org,
"Kiryl Shutsemau (Meta)" <kas@kernel.org>
Subject: [PATCH v3] iommu/arm-smmu-v3: Shrink command/event/PRI queues in kdump kernel
Date: Mon, 6 Jul 2026 09:47:08 +0100 [thread overview]
Message-ID: <20260706084708.8072-1-kas@kernel.org> (raw)
All SMMU queues are sized from the maxima the hardware advertises in IDR1,
which can be several megabytes each, and are allocated at probe. The kdump
kernel already disables the event and PRI queues (arm_smmu_device_reset()
drops CR0_EVTQEN/CR0_PRIQEN) but still allocates them at full size. On
systems with many SMMUv3 instances that cost is paid per instance and adds
up to tens of megabytes of coherent DMA in the capture kernel.
A kdump capture kernel runs from a small crashkernel reservation and only
has to drive the few devices used to save the dump, so deep queues serve
no purpose. The queues are not on the DMA data path, so dump throughput is
unaffected; a shallower command queue only bounds how many commands may be
in flight before a sync, which does not matter for the capture kernel's
small device count and modest I/O.
Clamp every queue to a single page when is_kdump_kernel() is true. Doing
it in arm_smmu_init_one_queue() covers the command, event and PRI queues
in one place. The command queue still holds at least one batch plus a sync
(256 entries on a 4K-page kernel, well above CMDQ_BATCH_ENTRIES), so
command batching keeps working.
Suggested-by: Kyle McMartin <jkkm@meta.com>
Signed-off-by: Kiryl Shutsemau (Meta) <kas@kernel.org>
Reviewed-by: Breno Leitao <leitao@debian.org>
Reviewed-by: Pranjal Shrivastava <praan@google.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
---
v3:
- Reword the commit message: all SMMU queues are sized from IDR1, and the
event/PRI queues, though disabled in kdump, are still allocated
(Pranjal Shrivastava).
- Collect Reviewed-by from Pranjal, Jason and Nicolin; Tested-by from
Nicolin.
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index e8d7dbe495f0..a4ec4a59e527 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -4414,6 +4414,20 @@ int arm_smmu_init_one_queue(struct arm_smmu_device *smmu,
{
size_t qsz;
+ /*
+ * A kdump capture kernel runs from a small crashkernel reservation and
+ * only has to drive the few devices used to save the dump, so there is
+ * no point sizing the queues for the (multi-megabyte) maxima the
+ * hardware advertises. Clamp each queue to a single page. ent_sz_shift
+ * is the log2 of the entry size in bytes (dwords * 8).
+ */
+ if (is_kdump_kernel()) {
+ u32 ent_sz_shift = ilog2(dwords) + 3;
+
+ q->llq.max_n_shift = min(q->llq.max_n_shift,
+ PAGE_SHIFT - ent_sz_shift);
+ }
+
do {
qsz = ((1 << q->llq.max_n_shift) * dwords) << 3;
q->base = dmam_alloc_coherent(smmu->dev, qsz, &q->base_dma,
--
2.54.0
reply other threads:[~2026-07-06 8:47 UTC|newest]
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