From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 55FFD3B7B6E for ; Mon, 6 Jul 2026 17:39:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783359586; cv=none; b=hW6RUWVHG5DzVjmKe1UJuXJBLD4hN1kpqJ875PjinNlgesjydHw4MHh8qxt8Fu5pVl/Yh8hrdt/cSetWtH4NCf4HOZtywJoL61rtfYhZMAvxkmSbGSJuzHk1MKTZHd4eQzvGsMagLIrCaUxDlFde11vG5QOfNXArCEJZqj8dEXg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783359586; c=relaxed/simple; bh=MBHDaVGsVT42vMuQT2poxN3PmStbNC+U0bdHG1zQRAQ=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=k/lNdaw3/s2J3R3YSxqrUbhtixHHldezaaMhqGfZNe0A8sUoVbeYv26zuX+agP4O1mchhJ+4BCrI6gKGjQEGKRKaXDkJZjIjlrN3s4lyVF7Dx5mroTq50lML9bFuQM9w9fK3mfW3br/uupvJF58qF/Vohaudwcdzx5O6vPUlRVk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=ZvT1HN0o; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="ZvT1HN0o" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F31EF1713; Mon, 6 Jul 2026 10:39:38 -0700 (PDT) Received: from localhost (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CFC553F7B4; Mon, 6 Jul 2026 10:39:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1783359583; bh=MBHDaVGsVT42vMuQT2poxN3PmStbNC+U0bdHG1zQRAQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ZvT1HN0o81jEnYn9V3MXwMiZuVTPkj6Fc2819z233/FpG6TlTrtnUI8qs+bKW6NyU kg3Q/rygvNqYmzOVsr9WS4p75wH9B7TovzQ3wq2DtFZptYkR6ROVqjZs5NyDo1ZRzW skwyPFHTzs2KmaMzIoD4QAobC4lIdRmssfiThccg= Date: Mon, 6 Jul 2026 18:39:40 +0100 From: Leo Yan To: Yeoreum Yun Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, suzuki.poulose@arm.com, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, jie.gan@oss.qualcomm.com Subject: Re: [PATCH v8 08/13] coresight: etm4x: fix inconsistencies with sysfs configuration Message-ID: <20260706173940.GB1024232@e132581.arm.com> References: <20260629090007.1718746-1-yeoreum.yun@arm.com> <20260629090007.1718746-9-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260629090007.1718746-9-yeoreum.yun@arm.com> On Mon, Jun 29, 2026 at 10:00:01AM +0100, Yeoreum Yun wrote: [...] > @@ -922,25 +950,7 @@ static int etm4_enable_sysfs(struct coresight_device *csdev, struct coresight_pa > { > struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > struct etm4_enable_arg arg = { }; > - unsigned long cfg_hash; > - int ret, preset; > - > - /* enable any config activated by configfs */ > - cscfg_config_sysfs_get_active_cfg(&cfg_hash, &preset); > - if (cfg_hash) { > - ret = cscfg_csdev_enable_active_config(csdev, cfg_hash, preset); > - if (ret) { > - etm4_release_trace_id(drvdata); > - return ret; > - } > - } > - > - raw_spin_lock(&drvdata->spinlock); > - > - drvdata->trcid = path->trace_id; > - > - /* Tracer will never be paused in sysfs mode */ > - drvdata->paused = false; > + int ret; > > /* > * Executing etm4_enable_hw on the cpu whose ETM is being enabled > @@ -948,20 +958,20 @@ static int etm4_enable_sysfs(struct coresight_device *csdev, struct coresight_pa > */ > arg.drvdata = drvdata; > arg.path = path; > + > + raw_spin_lock(&drvdata->spinlock); > + arg.config = drvdata->config; > + raw_spin_unlock(&drvdata->spinlock); > + > ret = smp_call_function_single(drvdata->cpu, > etm4_enable_sysfs_smp_call, &arg, 1); > if (!ret) > ret = arg.rc; > if (!ret) > - drvdata->sticky_enable = true; > - > - if (ret) > + dev_dbg(&csdev->dev, "ETM tracing enabled\n"); > + else > etm4_release_trace_id(drvdata); > > - raw_spin_unlock(&drvdata->spinlock); > - > - if (!ret) > - dev_dbg(&csdev->dev, "ETM tracing enabled\n"); > return ret; > } This is most valuable change for me, as now we will have much clear scope for what is protected ("drvdata->config"). However, a corner case was mentioned by Sashiko: | It appears etm4_enable_hw() modifies drvdata->ss_status while executing | via IPI, but sshot_ctrl_store() can modify the same array concurrently | from process context since the lock is no longer held across the | smp_call_function_single() call. "drvdata->ss_status" is a race condition between SMP call and sysfs knobs. Should we change to spinlock_irqsave/irqrestore when access drvdata->ss_status? Thanks, Leo