From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E5D18227EB9 for ; Tue, 7 Jul 2026 08:07:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783411635; cv=none; b=XWCzAXHnEm74v9g0ywKBeURIIhWqT/kuYV20vgbqAJmqSMzYXmIqQ2/VCiffHxypHHZb8iMO9s28oX/7pT0XjOkyQvyTG//W3ApjuPMgbF8k0zu2MrHVXHWOmhd4m74k2E6TRSZJh0QZ75vZ8+1WsCDRZvzR/GqgrrFHhn1ud5g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783411635; c=relaxed/simple; bh=sX5EZVB1oH6zpg7xImmTctzFiDXuMYq5ff7tEmh8srU=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=WJR42DTwm9liL4KjLCRR4hC079BAv9xV+S/td7bvZPEto1N8tp0gxYHO+Ia4ZIDbFoGKIyKUXCPi0TXE4DjI3lAAeFOzxlKo4teuOEFuBBY9VUVf0227qI8X7aL0E3XuSgdlGS11NYZLroxHpC+SVGsn51iKDe8x/6S/LEfTb6Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=BWSdSlSU; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="BWSdSlSU" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1EAFF1BCA; Tue, 7 Jul 2026 01:07:02 -0700 (PDT) Received: from localhost (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F345D3F85F; Tue, 7 Jul 2026 01:07:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1783411626; bh=sX5EZVB1oH6zpg7xImmTctzFiDXuMYq5ff7tEmh8srU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=BWSdSlSUWi/i+8R9Rwqt13/A4lRDyMQiKHmpd+S/MVokGklEgEtGj5nBElK3DzPer 00RuQT3IL8dsj29H0B4J5tr/8FDpz5BbRP9Y7F+KxQD0qFJmm1Q+1f0jk7Md4E6QNS m2eA6BqpBKqLTXVUuAGml7AfiY0BxMZ1bGdfTXSE= Date: Tue, 7 Jul 2026 09:07:03 +0100 From: Leo Yan To: Yeoreum Yun Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, suzuki.poulose@arm.com, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, jie.gan@oss.qualcomm.com Subject: Re: [PATCH v8 08/13] coresight: etm4x: fix inconsistencies with sysfs configuration Message-ID: <20260707080703.GC1024232@e132581.arm.com> References: <20260629090007.1718746-1-yeoreum.yun@arm.com> <20260629090007.1718746-9-yeoreum.yun@arm.com> <20260706173940.GB1024232@e132581.arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Jul 06, 2026 at 07:20:48PM +0100, Yeoreum Yun wrote: [...] > > However, a corner case was mentioned by Sashiko: > > > > | It appears etm4_enable_hw() modifies drvdata->ss_status while executing > > | via IPI, but sshot_ctrl_store() can modify the same array concurrently > > | from process context since the lock is no longer held across the > > | smp_call_function_single() call. > > > > "drvdata->ss_status" is a race condition between SMP call and sysfs > > knobs. Should we change to spinlock_irqsave/irqrestore when access > > drvdata->ss_status? > > I know this, but This is currently ignorable since > whatever perf or sysfs session, the ss_status is always clear > the PENDING and STATUS bits (and we make a compromise for this right now). > > And the sshot_ctrl_store()'s action is always clear above bits. > > So, This is ignorable comment from Sashiko. I understand it now, we can ignore it. Thanks for explanation.