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From: Harsh Jain <h.jain@amd.com>
To: <arnd@arndb.de>, <gregkh@linuxfoundation.org>,
	<michal.simek@amd.com>, <linux-kernel@vger.kernel.org>,
	<sarat.chand.savitala@amd.com>, <nkowlaku@amd.com>
Cc: Harsh Jain <h.jain@amd.com>
Subject: [PATCH 1/2] firmware: xilinx: Add Versal PUF PM API support
Date: Tue, 7 Jul 2026 15:26:19 +0530	[thread overview]
Message-ID: <20260707095620.2795456-2-h.jain@amd.com> (raw)
In-Reply-To: <20260707095620.2795456-1-h.jain@amd.com>

Add XPUF command IDs and versal_pm_puf_registration(),
versal_pm_puf_regeneration(), and versal_pm_puf_clear_id() wrappers
for invoking PUF operations via platform management firmware.

Also add versal_pm_puf_key_zero() so the misc driver can clear the
PUF-derived AES key via the existing XilSecure PM API.

Signed-off-by: Harsh Jain <h.jain@amd.com>
---
 drivers/firmware/xilinx/zynqmp-crypto.c     | 51 +++++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp-crypto.h | 30 ++++++++++++
 2 files changed, 81 insertions(+)

diff --git a/drivers/firmware/xilinx/zynqmp-crypto.c b/drivers/firmware/xilinx/zynqmp-crypto.c
index f06f1e2f67b8..4a4e0b79d126 100644
--- a/drivers/firmware/xilinx/zynqmp-crypto.c
+++ b/drivers/firmware/xilinx/zynqmp-crypto.c
@@ -236,3 +236,54 @@ int versal_pm_aes_init(void)
 	return zynqmp_pm_invoke_fn(XSECURE_API_AES_INIT, NULL, 0);
 }
 EXPORT_SYMBOL_GPL(versal_pm_aes_init);
+
+/**
+ * versal_pm_puf_registration - Invoke PUF registration through platform firmware
+ * @in_addr:	Physical address of the PUF parameter block
+ *
+ * Return:	Returns status from the firmware, or an error code.
+ */
+int versal_pm_puf_registration(const u64 in_addr)
+{
+	return zynqmp_pm_invoke_fn(XPUF_API_PUF_REGISTRATION, NULL, 2,
+				   lower_32_bits(in_addr),
+				   upper_32_bits(in_addr));
+}
+EXPORT_SYMBOL_GPL(versal_pm_puf_registration);
+
+/**
+ * versal_pm_puf_regeneration - Invoke PUF regeneration through platform firmware
+ * @in_addr:	Physical address of the PUF parameter block
+ *
+ * Return:	Returns status from the firmware, or an error code.
+ */
+int versal_pm_puf_regeneration(const u64 in_addr)
+{
+	return zynqmp_pm_invoke_fn(XPUF_API_PUF_REGENERATION, NULL, 2,
+				   lower_32_bits(in_addr),
+				   upper_32_bits(in_addr));
+}
+EXPORT_SYMBOL_GPL(versal_pm_puf_regeneration);
+
+/**
+ * versal_pm_puf_clear_id - Clear PUF ID via platform firmware
+ *
+ * Return:	Returns status from the firmware, or an error code.
+ */
+int versal_pm_puf_clear_id(void)
+{
+	return zynqmp_pm_invoke_fn(XPUF_API_PUF_CLEAR_PUF_ID, NULL, 0);
+}
+EXPORT_SYMBOL_GPL(versal_pm_puf_clear_id);
+
+/**
+ * versal_pm_puf_key_zero - Zero the PUF-derived KEK in the AES engine
+ *
+ * Return:	Returns status from the firmware, or an error code.
+ */
+int versal_pm_puf_key_zero(void)
+{
+	return zynqmp_pm_invoke_fn(XSECURE_API_AES_KEY_ZERO, NULL, 1,
+				   XSECURE_AES_PUF_KEY_SRC);
+}
+EXPORT_SYMBOL_GPL(versal_pm_puf_key_zero);
diff --git a/include/linux/firmware/xlnx-zynqmp-crypto.h b/include/linux/firmware/xlnx-zynqmp-crypto.h
index 56595ab37c43..710e40403663 100644
--- a/include/linux/firmware/xlnx-zynqmp-crypto.h
+++ b/include/linux/firmware/xlnx-zynqmp-crypto.h
@@ -32,6 +32,12 @@ struct xlnx_feature {
 #define XSECURE_API_AES_DECRYPT_FINAL	0x50f
 #define XSECURE_API_AES_KEY_ZERO	0x510
 #define XSECURE_API_AES_WRITE_KEY	0x511
+#define XSECURE_AES_PUF_KEY_SRC		0xb
+
+/* XilPuf API commands module id + api id */
+#define XPUF_API_PUF_REGISTRATION	0xc01
+#define XPUF_API_PUF_REGENERATION	0xc02
+#define XPUF_API_PUF_CLEAR_PUF_ID	0xc03
 
 #if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE)
 int zynqmp_pm_aes_engine(const u64 address, u32 *out);
@@ -47,6 +53,10 @@ int versal_pm_aes_dec_update(const u64 in_params, const u64 in_addr);
 int versal_pm_aes_dec_final(const u64 gcm_addr);
 int versal_pm_aes_enc_final(const u64 gcm_addr);
 int versal_pm_aes_init(void);
+int versal_pm_puf_registration(const u64 in_addr);
+int versal_pm_puf_regeneration(const u64 in_addr);
+int versal_pm_puf_clear_id(void);
+int versal_pm_puf_key_zero(void);
 
 #else
 static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)
@@ -114,6 +124,26 @@ static inline int versal_pm_aes_init(void)
 	return -ENODEV;
 }
 
+static inline int versal_pm_puf_registration(const u64 in_addr)
+{
+	return -ENODEV;
+}
+
+static inline int versal_pm_puf_regeneration(const u64 in_addr)
+{
+	return -ENODEV;
+}
+
+static inline int versal_pm_puf_clear_id(void)
+{
+	return -ENODEV;
+}
+
+static inline int versal_pm_puf_key_zero(void)
+{
+	return -ENODEV;
+}
+
 #endif
 
 #endif /* __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__ */
-- 
2.34.1


  reply	other threads:[~2026-07-07  9:56 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-07  9:56 [PATCH 0/2] Add Versal PUF support Harsh Jain
2026-07-07  9:56 ` Harsh Jain [this message]
2026-07-07  9:56 ` [PATCH 2/2] misc: Add Xilinx PUF driver Harsh Jain
2026-07-07 10:04   ` Arnd Bergmann
2026-07-07 10:41     ` Jain, Harsh (AECG-SSW)
2026-07-07 10:12   ` Greg KH
2026-07-07 10:52     ` Jain, Harsh (AECG-SSW)

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