From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f201.google.com (mail-pl1-f201.google.com [209.85.214.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59BA4372662 for ; Wed, 8 Jul 2026 03:11:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783480312; cv=none; b=s4Y8yNo3I/2FZHbcCRvOc7edSUCKQ2MrG8ctGpQm/nTzPOObsqLSfk5qI3x8MHXOjVf15+02PVh9tlglwWch0qkbVZDnGR61yC6rre1d1OeUUePMyKpSSNrDYMVAB2gRcUOjgddzWKoDw4JweEZbkz6dB/2UOxTzF9RSnJMawiU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783480312; c=relaxed/simple; bh=D/zOeJbrg9yDK1GS9aZ3w6jfOdYOq802AJraR7BTDvg=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=FCpIZ8MmrFS0jzRrVRYUaVw1O929bFfv26rcKbpRyt7gDElQVicjCeNoufc8YETUKoOljfXs6JQbk1pItOPLYU5ydi5F3czoaVSLuDPHr0puiGH/pRpDlt1Wq+wQ1jalfAXonB4u0vy0iZxurYpBowzZYG9bvAhWlm/vsFnaXOc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--jthoughton.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=AojJzAj2; arc=none smtp.client-ip=209.85.214.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--jthoughton.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="AojJzAj2" Received: by mail-pl1-f201.google.com with SMTP id d9443c01a7336-2cc8bde6318so5480005ad.3 for ; Tue, 07 Jul 2026 20:11:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1783480308; x=1784085108; darn=vger.kernel.org; h=content-type:cc:to:from:subject:message-id:references:mime-version :in-reply-to:date:from:to:cc:subject:date:message-id:reply-to :content-type; bh=i3qWnf+WjIw/N9fJ5EFWCJtG7j5Nn0VVg7E9Z8ZhI7s=; b=AojJzAj2CwrQuarjRuKb5Qy3FKCiBis4FTuB7VT1oTuP8W7TTksAqfc8zP6x/9Qra8 jCATMyJN7JZxUayt7wtUx61MMon1gz7Tv94WcKG5jZJNOwjMuoqXjEZJCmO9miIykHTi 60bnztTwl2fPDJFRU8sp1w6uj8xAQ8ntOHB2ndWWP107wp8U0XY8UvynoSXGg2i+dtDh iIDNNA0StZudtxyGCF7G1+GpkkZkp8x4ExglvQbR2iYV00+HT6AIVBJAGdeusI/NosyV F/BqA5cvttErRmzIZ7oWW93DJTwP7L1SOG/cVJ6nlyckOkw86Mn/HMb021To+iVcOM1s O/HQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783480308; x=1784085108; h=content-type:cc:to:from:subject:message-id:references:mime-version :in-reply-to:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=i3qWnf+WjIw/N9fJ5EFWCJtG7j5Nn0VVg7E9Z8ZhI7s=; b=FVt0F+hOHrM6VmV9YLTPDzraL5N5NbI8bLB1Fw0rYRd4PdQVR+WjMSB0h0jVJ0KTsA 8rLtgCM5tQEfzG1aACZ4S4a9dFN8KfpIUxwwRLQWtJhvlGCasR4GxReNp9IfoZNnGg55 K1uY7i/qhI1tY4e8ebeN5RBliiDUR7nZaqfJG3TCr3cZA/Owo+3+zLfg6JfJb03Qwslt PII3EYRUrgWl4+R6arySi7XJAaImnyCQku2SkZZPJVkQg8lT2XZ6pOnVX4Hb4J+klo4M jgYKLS1CxynyzhREsNi/oPT6Zy25jX07HMeEPFIpSjtycEL4GOYtB22uOFgOVNxwwj8/ Gi2g== X-Forwarded-Encrypted: i=1; AHgh+RpQdmzuZXLx8Jkao6ZIo1YiVZsGjZ1/UGr/0FLkkY5vgs/9zpGuDm6hPAsHda4Bzk1i+DV/WCcnyCCb4eI=@vger.kernel.org X-Gm-Message-State: AOJu0Yz7zG/CPxbigq0N66rcdmC3q6dxwrZOQJLPwhwurcm99f/kD/Ox fyTH13TXkSX+vPkcBH9GbeBzOzFQNrVHecj3xLc3QeGadZVYvJ9UdcIcbK/93p7k5woKB3pPphD nXEffuKCR/YEVvbvFSdFsNg== X-Received: from plhy17.prod.google.com ([2002:a17:902:d651:b0:2cc:c554:a93e]) (user=jthoughton job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:ce0b:b0:2ca:d7a3:371f with SMTP id d9443c01a7336-2ccea45e5e5mr6630235ad.22.1783480307457; Tue, 07 Jul 2026 20:11:47 -0700 (PDT) Date: Wed, 8 Jul 2026 03:11:26 +0000 In-Reply-To: <20260708031129.3503195-1-jthoughton@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260708031129.3503195-1-jthoughton@google.com> X-Mailer: git-send-email 2.55.0.795.g602f6c329a-goog Message-ID: <20260708031129.3503195-17-jthoughton@google.com> Subject: [PATCH 16/18] arm64: Allow "optional" CPU features to be required sometimes From: James Houghton To: Will Deacon , Catalin Marinas , Muchun Song , Oscar Salvador Cc: Nikos Nikoleris , Linu Cherian , Mark Rutland , David Hildenbrand , Andrew Morton , Ryan Roberts , Nanyong Sun , Yu Zhao , Frank van der Linden , David Rientjes , James Houghton , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org Content-Type: text/plain; charset="UTF-8" The HugeTLB vmemmap optimization feature should be optional if HVO is not in fact in use. Otherwise, on systems where the boot CPUs support HVO (HW AF) but the late CPUs do not, simply compiling with HVO support will prevent late-onlining. It is desirable to always compile in support for HVO without regressing late-onlining of CPUs on systems where HVO is not in use at run-time. If HVO is in fact in use at late-online time, HVO must have a way to prevent such incompatible CPUs from being onlined. Add the late_cpu_enable() callback to provide this "sometimes required" functionality. Signed-off-by: James Houghton --- arch/arm64/include/asm/cpufeature.h | 8 ++++++++ arch/arm64/kernel/cpufeature.c | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index a62c284962cf..d1504804f2be 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -367,6 +367,14 @@ struct arm64_cpu_capabilities { * routine must check it before taking any action. */ void (*cpu_enable)(const struct arm64_cpu_capabilities *cap); + /* + * In rare cases, capabilities are *sometimes* optional for late CPUs. + * This callback allows a capability to prevent onlining of + * incompatible CPUs when the capability is in fact required. + * + * Returns true iff onlining the CPU is permitted. + */ + bool (*late_cpu_enable)(const struct arm64_cpu_capabilities *cap); union { struct { /* To be used for erratum handling only */ struct midr_range midr_range; diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index c13433316e80..7e2c134f3b55 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -3684,6 +3684,14 @@ static void verify_local_cpu_caps(u16 scope_mask) */ if (!cpu_has_cap && !cpucap_late_cpu_optional(caps)) break; + + /* + * Some optional features may in fact be required due + * to particular runtime conditions. + */ + if (caps->late_cpu_enable && !caps->late_cpu_enable(caps)) + break; + /* * We have to issue cpu_enable() irrespective of * whether the CPU has it or not, as it is enabeld -- 2.55.0.795.g602f6c329a-goog