From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f202.google.com (mail-pl1-f202.google.com [209.85.214.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8DB64355814 for ; Wed, 8 Jul 2026 03:11:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.202 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783480308; cv=none; b=i+goxQ6O5/BgzlYrBj5P9xP/FBcvRfPhK8gv38qPTr3JsnnGzObz2S+UEd9IrfMXupE6+0IxGU1gPhmwUWmonfH4kpP0pp7kOcr5KDC8vq8DHTLg/AM/eMwOmI8ZMBRFSrBYFD7revgjWKd7npN9gWEgM83i4tXMq7mFZqFalU4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783480308; c=relaxed/simple; bh=+WmxVnqylwZ16aNrPRcMoQBENMLoXPK8olf/DqE0Uec=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=fNM2dm3rLD2TJPvsB1Ed0ggSM2fqBUPPfsTXLYBwYKl2PcSCaYdQaWHz0xX4UEK3qaEmrqPonpf8+Yv9ey6seqhKzxzzL6ZcFf/fzE611x7RoGyKm3/uO2ttz7Le6NnN9JW0a+UDA7YMVjLsJudiajyFtM+1FTfpkzlWgicvqL4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--jthoughton.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=i2PgkM0o; arc=none smtp.client-ip=209.85.214.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--jthoughton.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="i2PgkM0o" Received: by mail-pl1-f202.google.com with SMTP id d9443c01a7336-2ccea73f81bso4132295ad.2 for ; Tue, 07 Jul 2026 20:11:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1783480300; x=1784085100; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=jYFEot0xG+gqPBMU77C4lYbv1Usc9k6OYGJ/3Ree3IU=; b=i2PgkM0oobAu/qDkOrQKsyrtNK+XDIKBee1xam3Ohezebi2NeBuRY7QLxaWKDxN9Cd lExShxep1avK3oMd9VJdefxMitNdjw1qmhY+SIXF+cYe7LoSHfjdSjCibByerepb4tfb AyB45Y+FyX5tg1ISNYpjEunODOJne6DaafOjt17DkDvOZxlLQbuzd1iE12DVtYwPW6fc 7mogkG/Y68BLZSR9l419QrwzXut/JhkQftJf9Kh6jIFNGj7RGbxKQDfL5VQMKjUfBBFL WQRS3jJhWqHaLuWCAxELujfUWqI0OrSTutOOYgu9WStCHlZZciCKQx7nWbcUf36u5v+j NIqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783480300; x=1784085100; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=jYFEot0xG+gqPBMU77C4lYbv1Usc9k6OYGJ/3Ree3IU=; b=RjOr+9iLxPLkus1UbSGsWv6PaR56QvovdGg5W7FPUf+SYRwYIzu4yFMvYprzymuiSD W6xmVDzlYX1Hcx3fUVSVtQGtJL0BVTFUZV8+Pw1SNQXYdj+7/FNN+5uVtT3LVC6bt5z2 X2MXAk6g+lT/kowpfHjXpc08t8AB3zjpU7v63FwaEG/5q8Xv3kc1Yess2rQeGyGhYhFh sZ89lnYrT63oNKUPDATaUV1zMQL02l5Et5Z+HsIXT9uco5D5vFRXL1FOCcUbxP8PQ3b4 L/bjEqPHpUqTMG6wdZqfjyglOn+90ytYvr09qd+U4zr1l1SKv4Q+fy7HhGvnbSGsWk39 6ehw== X-Forwarded-Encrypted: i=1; AHgh+RpWcyx0lc9a0B1Wi1T4/SGyiKTsyXFiwAVvIHghqP9B50XfeJsBq07KqPmGpjebcFy3IwHuKdySGaWv4II=@vger.kernel.org X-Gm-Message-State: AOJu0YxxpRHwywVjef9D49jbmDVupxvPAJBi8C9AeUQ3ClgQeOplnDo6 RYxnt/byDIUgfe8UT8/HwazQeQ9Bd0bn1EzC9KXvxftc8ooKQsJoSVtgE+Kqpln6HjZYLuPSrm2 KM3o7RyCmzWV1vEt7VgqvtA== X-Received: from plbkq14.prod.google.com ([2002:a17:903:284e:b0:2c7:e8ed:e941]) (user=jthoughton job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:1b4e:b0:2ca:d658:d874 with SMTP id d9443c01a7336-2ccea45e8camr7594005ad.23.1783480299668; Tue, 07 Jul 2026 20:11:39 -0700 (PDT) Date: Wed, 8 Jul 2026 03:11:17 +0000 In-Reply-To: <20260708031129.3503195-1-jthoughton@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260708031129.3503195-1-jthoughton@google.com> X-Mailer: git-send-email 2.55.0.795.g602f6c329a-goog Message-ID: <20260708031129.3503195-8-jthoughton@google.com> Subject: [PATCH 07/18] arm64: Add system_supports_hvo From: James Houghton To: Will Deacon , Catalin Marinas , Muchun Song , Oscar Salvador Cc: Nikos Nikoleris , Linu Cherian , Mark Rutland , David Hildenbrand , Andrew Morton , Ryan Roberts , Nanyong Sun , Yu Zhao , Frank van der Linden , David Rientjes , James Houghton , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org Content-Type: text/plain; charset="UTF-8" Track HVO compatibility as its own system feature. If every boot CPU supports it, later onlining a CPU that doesn't support it won't be allowed. HVO requires BBM Level 2 no abort for the block -> table transitions when optimizing the vmemmap, and it requires hardware AF management to avoid taking page faults on the !AF translation that is installed as part of the RW table -> RO + new OA table transitions. Another possibility would be to disable HVO if an incompatible CPU were onlined; I haven't done this. Signed-off-by: James Houghton --- arch/arm64/include/asm/cpucaps.h | 2 ++ arch/arm64/include/asm/cpufeature.h | 5 +++++ arch/arm64/kernel/cpufeature.c | 16 ++++++++++++++++ arch/arm64/tools/cpucaps | 1 + 4 files changed, 24 insertions(+) diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index 25c61cda901c..6db3ef827f86 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -75,6 +75,8 @@ cpucap_is_possible(const unsigned int cap) return IS_ENABLED(CONFIG_HW_PERF_EVENTS); case ARM64_HAS_LSUI: return IS_ENABLED(CONFIG_ARM64_LSUI); + case ARM64_HVO_COMPATIBLE: + return IS_ENABLED(CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP); } return true; diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index e818ad1b56e2..a62c284962cf 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -885,6 +885,11 @@ static inline bool system_supports_bbml2_noabort(void) return alternative_has_cap_unlikely(ARM64_HAS_BBML2_NOABORT); } +static inline bool system_supports_hvo(void) +{ + return alternative_has_cap_unlikely(ARM64_HVO_COMPATIBLE); +} + int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt); bool try_emulate_mrs(struct pt_regs *regs, u32 isn); diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9a22df0c5120..3b9224b99a5f 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2172,6 +2172,16 @@ static bool has_bbml2_noabort(const struct arm64_cpu_capabilities *caps, int sco return cpu_supports_bbml2_noabort(); } +static bool hvo_compatible(const struct arm64_cpu_capabilities *caps, int scope) +{ + /* + * We need BBML2 to support Block -> Table transitions without taking + * faults, and we need HW AF support to support changing the OA without + * taking faults. + */ + return cpu_supports_bbml2_noabort() && supports_hw_af(scope); +} + static void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused) { /* @@ -3067,6 +3077,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .type = ARM64_CPUCAP_EARLY_LOCAL_CPU_FEATURE, .matches = has_bbml2_noabort, }, + { + .desc = "HugeTLB Vmemmap Optimization Support", + .capability = ARM64_HVO_COMPATIBLE, + .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .matches = hvo_compatible, + }, { .desc = "52-bit Virtual Addressing for KVM (LPA2)", .capability = ARM64_HAS_LPA2, diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 9b85a84f6fd4..630953d59c52 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -70,6 +70,7 @@ HAS_VIRT_HOST_EXTN HAS_WFXT HAS_XNX HAFT +HVO_COMPATIBLE HW_DBM KVM_HVHE KVM_PROTECTED_MODE -- 2.55.0.795.g602f6c329a-goog