From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAC3F4028D6 for ; Wed, 8 Jul 2026 08:25:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.175 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783499131; cv=none; b=ekBM6t8SRtDbFu/CT6q8b0vk4eflZjePBiYszeWl6WXn1tTKg+Gt6HDYpTWFSjVjrp/2RccAbrz5kcaSLX5lI3qwtlU/1tFgqVrIh3CYvvPoHDinAz5YAepbYHRqkfvSc605VSHr499G5u7h2pIvWCXxAP7/HgVP+gZoSl6iMvY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783499131; c=relaxed/simple; bh=6+AWnhGvzr9BcTVL8+ch4QRT0EtaOFi7bOI5xBH/z0c=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=SNL5SI+ZaFjpl2ndL9OztoT1W2VlBNOYFlNud6D3b+0t3R7MErAnPISZ8VeQjgRJb13YVZGYvT9+2YRJCl1OM+W9234sSluUu9tNsk4cW4N94Btxlf4wZjaNVerNZmyABQOovjnnGVsxgOj2tNTDe/JtxA/WzccOQvI3E+1v0zo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EMYlfqQ9; arc=none smtp.client-ip=209.85.214.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EMYlfqQ9" Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-2c7c61b5292so8401115ad.0 for ; Wed, 08 Jul 2026 01:25:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1783499118; x=1784103918; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to:content-type; bh=0jyaycIlFsITmoKtSt+baeUtSj03KZOHsdXm+Zi9cFI=; b=EMYlfqQ9fr7PnhWt9YqOzOQY+JyA+BmgBMbDlneEWHWEt7Thn5uPu/s60C1VgMWzwt zG1yFaeTkRAxCPVOraJsYf7vJAce8DJEZdT/lIdRVTDSerIDnTR0k7Pk7Cwcw3YiIi71 +KFYqSQCi670yJF1aq8nHak1r1uO6Cd3Y7ffE2fzLeGDQDQokAqCwzI9Sd6r3YtHMxfk KFL1tGs+G7Ui6pOrlvYvyGYJWK3vbbyBmZh/QkE1fwQATw4yle8pitkvDUZMxUtTlbyA UlWFM/xMR8OgRSG0PkDny5ubQtMjiUErfZtZw+cUeGywvrRGYmSeOrXm0g3xFu5SM8QI L3uA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783499118; x=1784103918; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=0jyaycIlFsITmoKtSt+baeUtSj03KZOHsdXm+Zi9cFI=; b=C03dmU/6X9T6M6WUlnyFJHQlwfnwIR+25ozfyH14koFwB+Izd/rIvLnTzD5TN6a1u7 vSjCoAM3Jko45goKexsR5QeUK4Axf5sYObBXXuwFEvWewCELgyLvOgtYS4i3C/wC31xh 5WZOZFCORMrm2Jn8Siy4pqr9RaipjAgvbLe0JWrKeSwjl7RKhFL2Nc2E/3AGpSjs+klT 7lbnpiIagTe1GIDw5oJUcj9gUqORN05FFN7yVVYJ7xH9dFFuoJz7FhH3xVopFxU0p2qW 9zQT6Ebrgcw/FCUBrw/phoOHnZk7rUMhhRpNYY5b3wu5qco4KMyxh8UM+89091O1Nlxy i7lg== X-Forwarded-Encrypted: i=1; AHgh+Rq9wuHR6MlXvl57wegDAunZYxyTidvdkgDFdR9XejLUXoHjFSazQakxuOsN7s3mYW8ARYO60i/W+yiOvns=@vger.kernel.org X-Gm-Message-State: AOJu0YysGNWFMaaTXboQTxuNdU7IgGeA6pLWFdiJwf2C7zKy71/6wE9H yxucNQtT2g3L+380JQMdFPU0YxwjtX/vhYm6dGN3hoTc4mPYvb8O4qhR X-Gm-Gg: AfdE7ckuTi0Jk4mJ71mptfI9aNhcJXX08IywfEh+Uymfd2PQ2KF3eVxeUJBr0CuIJV6 95gv1VRg1IjvdOviFFqo7+PSTj043anJ/fxjD5LAbuDYV9DRJxyfLoQuE+ZZIJmiOF1ZoJkGpKv S4aon4U3EktuiERl2BU0XbiMFO3kGsHJ47WPKg4U0CZNlAF39t1V5oAPo5LVmuRtaWYVgBlmlsh IUtv5K9TG3VhZzHPakwuMu1qlIDOxVFSsXK8inNybNsu0Nz7L8ePxEMzSQWH/9osqO0WV1MaOl3 sBgLvzaKY6MpZ+i6Q5MvgCvZDYB/ECJYRITtvvvPuPm1FkMn6GCKedz+ESmVhcGD8dh+e88BNPO VeYecH2XxvohYEb47jmmzJ20Wv0S+1yJDrZUfeRwm/1QMV3ewWLiquH5QPWC0bAQWO/bqoMGOwk 5b/3UXI8TaP0cM+7DoNSiSPFWhpiK616xqH5yCHLBb0ra3jzcygjtqQa7ndvoU0jRqASxMsXw= X-Received: by 2002:a17:903:b07:b0:2c8:1c05:16aa with SMTP id d9443c01a7336-2ccea2d56f0mr17414495ad.19.1783499118444; Wed, 08 Jul 2026 01:25:18 -0700 (PDT) Received: from localhost.localdomain (60-250-196-139.hinet-ip.hinet.net. [60.250.196.139]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ccc9d3d952sm24010315ad.61.2026.07.08.01.25.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 01:25:18 -0700 (PDT) From: Zi-Yu Chen To: arnd@arndb.de, olof@lixom.net Cc: soc@lists.linux.dev, ychuang3@nuvoton.com, schung@nuvoton.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Zi-Yu Chen Subject: [PATCH v2 RESEND] arm64: dts: nuvoton: ma35d1: add CAN nodes Date: Wed, 8 Jul 2026 16:24:57 +0800 Message-Id: <20260708082457.460710-1-zychennvt@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add controller nodes for the four Bosch M_CAN blocks found on the Nuvoton MA35D1 SoC. Additionally, configure pinctrl and enable CAN1 and CAN3 on the MA35D1 SOM board. Also, update the APLL frequency to 200MHz to ensure the CAN controllers receive the required input clock for 50MHz operation. Signed-off-by: Zi-Yu Chen --- Resend note: - resend with the complete Cc list; no patch changes .../boot/dts/nuvoton/ma35d1-som-256m.dts | 32 +++++++++++- arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 52 +++++++++++++++++++ 2 files changed, 83 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts index f6f20a17e501..fb23b0573bdc 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts @@ -37,6 +37,22 @@ clk_hxt: clock-hxt { }; }; +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + assigned-clocks = <&clk CAN1_DIV>; + assigned-clock-rates = <50000000>; + status = "okay"; +}; + +&can3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can3>; + assigned-clocks = <&clk CAN3_DIV>; + assigned-clock-rates = <50000000>; + status = "okay"; +}; + &clk { assigned-clocks = <&clk CAPLL>, <&clk DDRPLL>, @@ -45,7 +61,7 @@ &clk { <&clk VPLL>; assigned-clock-rates = <800000000>, <266000000>, - <180000000>, + <200000000>, <500000000>, <102000000>; nuvoton,pll-mode = "integer", @@ -56,6 +72,20 @@ &clk { }; &pinctrl { + can-grp { + pinctrl_can1: can1-pins { + nuvoton,pins = <11 14 4>, + <11 15 4>; + bias-disable; + }; + + pinctrl_can3: can3-pins { + nuvoton,pins = <11 10 3>, + <11 11 3>; + bias-disable; + }; + }; + uart-grp { pinctrl_uart0: uart0-pins { nuvoton,pins = <4 14 1>, diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi index e51b98f5bdce..494724a25f3b 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi +++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi @@ -244,6 +244,58 @@ gpion: gpio@340 { }; }; + can0: can@403c0000 { + compatible = "bosch,m_can"; + reg = <0x0 0x403c0000 0x0 0x200>, <0x0 0x403c0200 0x0 0x2000>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&clk HCLK3>, <&clk CAN0_GATE>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 4 4 32 32 32 8 8>; + status = "disabled"; + }; + + can1: can@403d0000 { + compatible = "bosch,m_can"; + reg = <0x0 0x403d0000 0x0 0x200>, <0x0 0x403d0200 0x0 0x2000>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&clk HCLK3>, <&clk CAN1_GATE>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 4 4 32 32 32 8 8>; + status = "disabled"; + }; + + can2: can@403e0000 { + compatible = "bosch,m_can"; + reg = <0x0 0x403e0000 0x0 0x200>, <0x0 0x403e0200 0x0 0x2000>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&clk HCLK3>, <&clk CAN2_GATE>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 4 4 32 32 32 8 8>; + status = "disabled"; + }; + + can3: can@403f0000 { + compatible = "bosch,m_can"; + reg = <0x0 0x403f0000 0x0 0x200>, <0x0 0x403f0200 0x0 0x2000>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&clk HCLK3>, <&clk CAN3_GATE>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 4 4 32 32 32 8 8>; + status = "disabled"; + }; + uart0: serial@40700000 { compatible = "nuvoton,ma35d1-uart"; reg = <0x0 0x40700000 0x0 0x100>; -- 2.34.1