From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-106112.protonmail.ch (mail-106112.protonmail.ch [79.135.106.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C00733AC0FE for ; Wed, 8 Jul 2026 11:44:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.112 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783511058; cv=none; b=YL7IPsq0ZuSIUzR+zSFoTd9Fsb7txlzroZqShBUb1LvgGP1xnAMFXqHCri/CorLW6gseBNxf6R021/XxKJHsRb56PF3/0K3oI+jcZ1PJAkcX5k9N4ClDNeTf2Q4OP11baDp/DS1satnm7nNQBt32A/sF95d8fKUEKC0sczHPHqo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783511058; c=relaxed/simple; bh=BOKt56l2oCnjHiwEWb+sRGxxX1CsSYjr5S+hsrG3QNk=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=nj/0zDGK2b60sj4vWvg07iV782CWW+1djoSkDavrG0Ug0isl+bfngOmkyZb4YgAJSsSl9yyX0UNIKOvHQJ9q0FSDw4Bb5R9y6Q8yWmBaKZykPILiPU2Baj6S2x7vTQsmzHPfPwSs5guufmhEDK2GpkLlx/EFSh8MlkJa06QinyM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=onurozkan.dev; spf=pass smtp.mailfrom=onurozkan.dev; dkim=pass (2048-bit key) header.d=onurozkan.dev header.i=@onurozkan.dev header.b=L7CsT0o0; arc=none smtp.client-ip=79.135.106.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=onurozkan.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=onurozkan.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=onurozkan.dev header.i=@onurozkan.dev header.b="L7CsT0o0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=onurozkan.dev; s=protonmail; t=1783511046; x=1783770246; bh=98BuDxfPN3ycydYh5YeFIerx+ZVFF9AZgH6hOQcVjdo=; h=From:To:Cc:Subject:Date:Message-ID:From:To:Cc:Date:Subject: Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=L7CsT0o0Y53yVoFSIfMCKLGfGaR+REZF1Mm4w+PsVFNu4Z3HFld0Z+l+kJYgCsigs bsCJOYfxAdjSem5UAuZFKAEQCSR5wq0LhOuTlAnT6PVyaFUts5TTstDiRg0nDhzCBT eJ+Jhs3+23bNkApTf0IpyHk9+4mzVsc7EOkR4WZxdPjybXIyc1RVCHOcC9LUcesvvs IeKGacDawQRsESBGuBfFz83iyEwzChT8Kj//FANRLCt8j+1XhBDmL8qSBZEHp6U4xP MJJmy00BR42cvO+wF8khWo6oHji3hfyptauiH762zaO4YEaMKdRQz9ieYuUlB0lqFT Nnb94ckqPxU+g== X-Pm-Submission-Id: 4gwGTF5LHhz1DDLC From: =?UTF-8?q?Onur=20=C3=96zkan?= To: linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: dakr@kernel.org, aliceryhl@google.com, daniel.almeida@collabora.com, airlied@gmail.com, simona@ffwll.ch, ojeda@kernel.org, boqun@kernel.org, gary@garyguo.net, bjorn3_gh@protonmail.com, lossin@kernel.org, a.hindborg@kernel.org, tmgross@umich.edu, =?UTF-8?q?Onur=20=C3=96zkan?= Subject: [PATCH v3 0/3] implement GPU reset API Date: Wed, 8 Jul 2026 14:43:15 +0300 Message-ID: <20260708114358.957305-1-work@onurozkan.dev> X-Mailer: git-send-email 2.51.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for scheduling GPU resets on a dedicated workqueue. Track the reset state to avoid queueing another reset while one is already pending or in progress. Use an SRCU based gate to block new hardware access once a reset is scheduled and wait for current users before starting it. Run the pre_reset() and post_reset() hooks around the reset sequence so driver components can prepare for a reset and restore their state afterwards. Model the reset stages with a typestate pattern where each operation consumes the current state and returns the next one. This keeps the pre_reset(), GPU reset and post_reset() calls in order and prevents a stage from being called twice accidentally. Stop new reset requests during teardown and drain any queued or running reset work before releasing the device resources. Also move the existing synchronous reset sequence into the reset module and use it for both the initial reset and scheduled resets. This implementation is WIP and will be followed with more work later. It should be safe to land this series as there's no hardware using this API yet. Based on 'commit 53441a9cae3c ("drm/tyr: program CSF global interface")' from tyr-for-upstream with the following patch series on the ML: - rust: workqueue: add cancel_sync support [1] - rust: add SRCU abstraction [2] - rust: workqueue: add ScopedQueue for lifetime bound items [3] - Creation of workqueues in Rust [4] TODOs: - On post_reset() failure, we don't do anything for now. We should unplug the GPU (that's what Panthor does) but we don't have the infrastructure for that yet [5]. - In schedule(), similar to panthor_device_schedule_reset(), we should have a PM check but similar to the note above, we don't have the infrastructure for that yet. Changes since v2: - Replaced Work::disable_sync with Work::cancel_sync. - Used type state pattern for reset stages. - Using ScopedQueue with device lifetime instead of a static workqueue. - Removed SRCU patch from this series. Changes since v1: - Removed OrderedQueue and using Alice's workqueue implementation [1] instead. - Added Resettable trait with pre_reset and post_reset hooks to be implemented by reset-managed hardwares. - Added SRCU abstraction and used it to synchronize the reset work and hardware access. v1: https://lore.kernel.org/rust-for-linux/20260313091646.16938-1-work@onurozkan.dev v2: https://lore.kernel.org/rust-for-linux/20260416171728.205141-1-work@onurozkan.dev Link: https://lore.kernel.org/all/20260617131731.145337-1-work@onurozkan.dev [1] Link: https://lore.kernel.org/all/20260613065348.96750-1-work@onurozkan.dev [2] Link: https://lore.kernel.org/all/20260617144645.253444-1-work@onurozkan.dev [3] Link: https://lore.kernel.org/all/20260312-create-workqueue-v4-0-ea39c351c38f@google.com [4] Link: https://gitlab.freedesktop.org/panfrost/linux/-/work_items/29#note_3391826 [5] Link: https://gitlab.freedesktop.org/panfrost/linux/-/issues/28 Onur Özkan (3): rust: workqueue: impl Send and Sync for OwnedQueue drm/tyr: clear stale IRQ state before soft reset drm/tyr: add GPU reset infrastructure drivers/gpu/drm/tyr/driver.rs | 39 ++-- drivers/gpu/drm/tyr/reset.rs | 323 +++++++++++++++++++++++++++ drivers/gpu/drm/tyr/reset/hw_gate.rs | 298 ++++++++++++++++++++++++ drivers/gpu/drm/tyr/tyr.rs | 1 + rust/kernel/workqueue/mod.rs | 8 + 5 files changed, 644 insertions(+), 25 deletions(-) create mode 100644 drivers/gpu/drm/tyr/reset.rs create mode 100644 drivers/gpu/drm/tyr/reset/hw_gate.rs -- 2.51.2