From: Colton Lewis <coltonlewis@google.com>
To: stable@vger.kernel.org
Cc: oliver.upton@linux.dev, sashal@kernel.org,
gregkh@linuxfoundation.org, mizhang@google.com,
catalin.marinas@arm.com, will@kernel.org, maz@kernel.org,
james.morse@arm.com, suzuki.poulose@arm.com,
yuzenghui@huawei.com, mark.rutland@arm.com,
ahmed.genidi@arm.com, leo.yan@arm.com, miguel.luis@oracle.com,
dbrazdil@google.com, kvmarm@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 6.6 v2 1/6] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1
Date: Wed, 8 Jul 2026 22:51:19 +0000 [thread overview]
Message-ID: <20260708225124.4130846-2-coltonlewis@google.com> (raw)
In-Reply-To: <20260708225124.4130846-1-coltonlewis@google.com>
From: Marc Zyngier <maz@kernel.org>
[ Upstream commit cfc680bb04c54e61faa51a34d8383a0aa25b583f ]
ARMv9.5 has infroduced ID_AA64MMFR4_EL1 with a bunch of new features.
Add the corresponding layout.
This is extracted from the public ARM SysReg_xml_A_profile-2023-09
delivery, timestamped d55f5af8e09052abe92a02adf820deea2eaed717.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Miguel Luis <miguel.luis@oracle.com>
Link: https://lore.kernel.org/r/20240122181344.258974-5-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
---
arch/arm64/tools/sysreg | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 76ce150e7347e..f7180d391f829 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -1669,6 +1669,43 @@ UnsignedEnum 3:0 TCRX
EndEnum
EndSysreg
+Sysreg ID_AA64MMFR4_EL1 3 0 0 7 4
+Res0 63:40
+UnsignedEnum 39:36 E3DSE
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Res0 35:28
+SignedEnum 27:24 E2H0
+ 0b0000 IMP
+ 0b1110 NI_NV1
+ 0b1111 NI
+EndEnum
+UnsignedEnum 23:20 NV_frac
+ 0b0000 NV_NV2
+ 0b0001 NV2_ONLY
+EndEnum
+UnsignedEnum 19:16 FGWTE3
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+UnsignedEnum 15:12 HACDBS
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+UnsignedEnum 11:8 ASID2
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+SignedEnum 7:4 EIESB
+ 0b0000 NI
+ 0b0001 ToEL3
+ 0b0010 ToELx
+ 0b1111 ANY
+EndEnum
+Res0 3:0
+EndSysreg
+
Sysreg SCTLR_EL1 3 0 1 0 0
Field 63 TIDCP
Field 62 SPINTMASK
--
2.55.0.795.g602f6c329a-goog
next prev parent reply other threads:[~2026-07-08 22:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 22:51 [PATCH 6.6 v2 0/6] arm64: KVM: Backport VHE-only boot fixes Colton Lewis
2026-07-08 22:51 ` Colton Lewis [this message]
2026-07-09 10:16 ` [PATCH 6.6 v2 1/6] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1 Marc Zyngier
2026-07-09 20:30 ` Colton Lewis
2026-07-08 22:51 ` [PATCH 6.6 v2 2/6] arm64: Treat HCR_EL2.E2H as RES1 when ID_AA64MMFR4_EL1.E2H0 is negative Colton Lewis
2026-07-08 22:51 ` [PATCH 6.6 v2 3/6] arm64: Fix early handling of FEAT_E2H0 not being implemented Colton Lewis
2026-07-08 22:51 ` [PATCH 6.6 v2 4/6] KVM: arm64: Initialize HCR_EL2.E2H early Colton Lewis
2026-07-08 22:51 ` [PATCH 6.6 v2 5/6] KVM: arm64: Initialize SCTLR_EL1 in __kvm_hyp_init_cpu() Colton Lewis
2026-07-08 22:51 ` [PATCH 6.6 v2 6/6] arm64: Revamp HCR_EL2.E2H RES1 detection Colton Lewis
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