From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8A0B336A362 for ; Thu, 9 Jul 2026 15:24:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783610655; cv=none; b=IGan4fRq2PEJGszNjWzg9HCPs1Nlt9VojcJBvkJLvfwKptUr6X5fVNt/HSdCMQByaQJXtTtw4OtNI5UA1BTrgSzg2BrtoOQx7Xa1RN4sIOz9VUMC1CicqyM8GsTMKLEXZpF3dIb6o5MAKK75hiOW9iXcfW7FuPgbtXpMwq9I9h4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783610655; c=relaxed/simple; bh=y2EdGgcYCeMQTN2d2raGGRWucRhx04n1Fo4cVzsHSF4=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Ibj/YmvDzMO+qPSuhfxbmt51g84L4ayhl+semPuDJ7EfYFwZTLFRRhGNLevdp3RNsL0Q+Z18jrV0yTUpxNDbCYPFQyeOmq4aFlavIpUn2aMKNnFEUNnrNfoC+pnUj5hR3TPCHE8OSTU62hO+FC/l2NIr4YdmUxOt35Kn4KE/LyM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=cuOmo+75; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="cuOmo+75" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7A9D31570; Thu, 9 Jul 2026 08:24:08 -0700 (PDT) Received: from localhost (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6F5913F85F; Thu, 9 Jul 2026 08:24:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1783610652; bh=y2EdGgcYCeMQTN2d2raGGRWucRhx04n1Fo4cVzsHSF4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cuOmo+75H2bWgqc00DyGlUC0Q4vx8whBp7edV8eGumP4e8wlaaacX0lei3xQpXyxk OQMPsOnBVo9LitGJA3pruJq/iiUQmjVJozSyys0h5Q8q4M6FYs5WtExcPLIivot8o1 UnULazED53+nJ3WxaiIrUkRStPz9r9CDfTTt4MME= Date: Thu, 9 Jul 2026 16:24:10 +0100 From: Leo Yan To: Jie Gan Cc: Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Anshuman Khandual , Yeoreum Yun , Yuanfang Zhang , Maxime Coquelin , Alexandre Torgue , Tingwei Zhang , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: Re: [PATCH v2 1/2] coresight: Fix clock refcount imbalance on platform remove Message-ID: <20260709152410.GE1024232@e132581.arm.com> References: <20260702-fix-clock-refcount-unbalance-v2-0-2383fbb9952e@oss.qualcomm.com> <20260702-fix-clock-refcount-unbalance-v2-1-2383fbb9952e@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260702-fix-clock-refcount-unbalance-v2-1-2383fbb9952e@oss.qualcomm.com> On Thu, Jul 02, 2026 at 04:54:19PM +0800, Jie Gan wrote: [...] > static void etm4_remove_platform_dev(struct platform_device *pdev) > { > struct etmv4_drvdata *drvdata = dev_get_drvdata(&pdev->dev); > > if (drvdata) > etm4_remove_dev(drvdata); I understood this is not an issue caused by this patch, could you refine a bit as blow so can be consistent: if (WARN_ON(!drvdata)) return; > + /* > + * Resume the device so its clocks are enabled again, balancing the > + * clk_disable_unprepare() that devm runs when the driver detaches. > + * Then mark it suspended and drop the usage count taken here. > + */ > + pm_runtime_get_sync(&pdev->dev); etm4_remove_dev(drvdata); > pm_runtime_disable(&pdev->dev); > + pm_runtime_set_suspended(&pdev->dev); > + pm_runtime_put_noidle(&pdev->dev); > } With above change: Reviewed-by: Leo Yan