From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEB7F466B53; Thu, 9 Jul 2026 17:24:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783617885; cv=none; b=KViTDZ3/iVh1+ye6tVA7qSA1QBW9lxAl1zp5T9w5tj3nz6rIoMutiOFjMPtiYaRSjSx3C2boHZgd+ddC/aGu5iEjIj64h8vREz8Iahs1dxgQrSziHoU96I7q6TAX32QnJQME7YNUxfXdfDykKzFL87TpgUlPMRZ8rILkvxC1fnA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783617885; c=relaxed/simple; bh=MPujsGswY9o6XsIxCG+x+4eNh8rHmoYYDBHfhV/qxT4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uvv46y4mYHNgeZCcW9nW/+hmRVFNI5GXNYDngMxkg5zE6Ynq3YECltvKhwY6v1OQ4+RkjPxXa/MG3m4kCgl4XpPD1UxQKrZgSLf23TyG/AoFfer+atpJ0zUBXazx2jdXAIIrBP/nFgZuX/9DLP3TJb+zCf/U9J24WM0OrLPw+NU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=J7KfLcIO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="J7KfLcIO" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5E612C2BD05; Thu, 9 Jul 2026 17:24:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1783617885; bh=MPujsGswY9o6XsIxCG+x+4eNh8rHmoYYDBHfhV/qxT4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=J7KfLcIOA6pwcAbvrj11hFe1OJayktjgDcCeOQ3mNgYFWIoHmmqkDAv1TwNTyCaJO oK+p9WEA40ntm5QOK1ectE7u79Rni2a3xjRMQ5cO7lAUNIHrmAVy+F4W7g97FlJOVk H2hMknUKyxg2IuE2JYpMIruof57ngXxYkEpAxvv+Wfc1j36D9MpgEEkrNhPc/+rYIN dpij0nlhFsvEG139CoRkYXzUZHd02EaQtyNwTqrQBAaoC6WbPNY5GcXW8naXLYip1w JP1rwulkVSf9VoBKAbhbThs2KVAzlWBnQZcgVx2vPvmM3n0Uc5nE7PoKWBvTR9W5gw YgLilWEYslGZQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D419C44501; Thu, 9 Jul 2026 17:24:45 +0000 (UTC) From: Miao Wang via B4 Relay Date: Fri, 10 Jul 2026 01:24:23 +0800 Subject: [PATCH RFC v3 7/7] mfd: ls2kbmc: Capture the reset event of BMC through GPIO Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260710-ls2kbmc-mod-v3-7-ef718636e78e@gmail.com> References: <20260710-ls2kbmc-mod-v3-0-ef718636e78e@gmail.com> In-Reply-To: <20260710-ls2kbmc-mod-v3-0-ef718636e78e@gmail.com> To: Binbin Zhou , Chong Qiao , Lee Jones , Huacai Chen , Corey Minyard , Linus Walleij , Bartosz Golaszewski Cc: Xi Ruoyao , WANG Xuerui , Yinbo Zhu , Jiaxun Yang , mfd@lists.linux.dev, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, openipmi-developer@lists.sourceforge.net, Miao Wang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=8511; i=shankerwangmiao@gmail.com; s=20250715; h=from:subject:message-id; bh=lcZh8gArBlUsxVf/oSboZ+zg1zTqwHMktoD4mL9iQSE=; b=owEBbQKS/ZANAwAKAbAx48p7/tluAcsmYgBqT9lapq5khaFN5t6QpvCO7EmrAJt7/LoLmOLhZ pN+E6LzYpuJAjMEAAEKAB0WIQREqPWPgPJBxluezBOwMePKe/7ZbgUCak/ZWgAKCRCwMePKe/7Z bmT4D/wLU9InTMKUUyp2/bLKEKpnqaOr6VGnUXFusoxKIOwqr5s3iV5KSv/pIqBwq/WYlMatr7I yub6dS1YptIfC43MSEUBxsT24dEexF+eX61LhKgpVriapoYrYhfRqUmdFDUo54kftQvTBkVI281 yMryA0nfLnsn3MaLWVBEaxiw0AnHGinvKTs0bLQQZwECh2CoOefd+S8ERymsVsSrk1k5Ypcy7rM pmuJQmE7qlrIY/I4kO5cvx8AfG9jSbP8GQXNrpa2uGQZOgBoX9Xwb/MjczmUUNxGUMBF60eaziM tnxt4/WRscUCvtlIIBgl/deI2g+qpbnsAEF8Shv4eoTcHB1AYawsokX24xk3v84GlVzPNs5Fhd4 R9QiYHzSeNNcwlLvlHASs60SEaEDUx0XYqBHuP5u96ybR14CF4RYhmaHIulhaBLcl41Pc7YcRr6 fY+3LUCPlk1saEphUJt1NmFHwFfM+B5JftqsYGM5KEiJw6NQs8aSttG3J7X43Y+DgvGBeO47X84 8PYWVIC26AEkTp5Dp7NhE6E1en8PlZ+AvvYfqA4rfdkOqrintH2esa8ZPRljnhXTiHFjWdv35mT ZJnkYQsizb42tNcSjA3DXxSYU3XfGrPOxCabwYV5KpjM1SQK6V5+7M5yOpDMSwhvWgNEB/M/swF vrV5TMjcnmM+ZxA== X-Developer-Key: i=shankerwangmiao@gmail.com; a=openpgp; fpr=6FAEFF06B7D212A774C60BFDFA0D166D6632EF4A X-Endpoint-Received: by B4 Relay for shankerwangmiao@gmail.com/20250715 with auth_id=462 X-Original-From: Miao Wang Reply-To: shankerwangmiao@gmail.com From: Miao Wang The reset event of BMC is captured through GPIO. However, this driver bypasses the GPIO framework and directly accesses the GPIO controller through the fixed address. When the same GPIO controller is also exposed through ACPI and probed by the corresponding GPIO driver, there would be a conflict between the two drivers. This patch will try to find the GPIO through declared GPIO pin in the _CRS resources of the ACPI node. If no such delaration is found, the driver will fall back to search for the correct GPIO controller and pin according to the fixed address and pin number. A possible DSDT declaration for the GPIO pin might be as follows: Device (BMC0) { Name (_ADR, ...) // Match the PCI address of the BMC device // \_SB.GPO1 is the ACPI path of the GPIO controller Name (_CRS, ResourceTemplate () { GpioInt (Edge, ActiveLow, Exclusive, PullNone, 0, "\\_SB.GPO1", 0) { 14 // 14 is the GPIO pin number } } Signed-off-by: Miao Wang --- drivers/mfd/ls2k-bmc-core.c | 158 +++++++++++++++++++++++++++++++------------- 1 file changed, 111 insertions(+), 47 deletions(-) diff --git a/drivers/mfd/ls2k-bmc-core.c b/drivers/mfd/ls2k-bmc-core.c index 1466b314fc4e577fe5e31404444648b5b0447ebb..5a2644ff07fee05f4c8cbc54cb62abc2358c1820 100644 --- a/drivers/mfd/ls2k-bmc-core.c +++ b/drivers/mfd/ls2k-bmc-core.c @@ -26,6 +26,10 @@ #include #include #include +#include +#include +#include +#include /* LS2K BMC resources */ #define LS2K_DISPLAY_RES_START (SZ_16M + SZ_2M) @@ -81,18 +85,6 @@ #define PCI_REG_STRIDE 0x4 -#define LS2K_BMC_RESET_GPIO 14 -#define LOONGSON_GPIO_REG_BASE 0x1FE00500 -#define LOONGSON_GPIO_REG_SIZE 0x18 -#define LOONGSON_GPIO_OEN 0x0 -#define LOONGSON_GPIO_FUNC 0x4 -#define LOONGSON_GPIO_INTPOL 0x10 -#define LOONGSON_GPIO_INTEN 0x14 - -#define LOONGSON_IO_INT_BASE 16 -#define LS2K_BMC_RESET_GPIO_INT_VEC (LS2K_BMC_RESET_GPIO % 8) -#define LS2K_BMC_RESET_GPIO_GSI (LOONGSON_IO_INT_BASE + LS2K_BMC_RESET_GPIO_INT_VEC) - enum { LS2K_BMC_DISPLAY, LS2K_BMC_IPMI0, @@ -186,6 +178,7 @@ struct ls2k_bmc_ddata { struct work_struct bmc_reset_work; struct ls2k_bmc_pci_data bmc_pci_data; struct ls2k_bmc_bridge_pci_data bridge_pci_data; + struct gpio_desc *reset_gpio; }; static bool ls2k_bmc_bar0_addr_is_set(struct pci_dev *pdev) @@ -375,6 +368,90 @@ static void ls2k_bmc_save_pci_data(struct pci_dev *pdev, struct ls2k_bmc_ddata * pci_read_config_dword(pdev, PCI_INTERRUPT_LINE, &ddata->bmc_pci_data.interrupt_line); } +static struct fwnode_handle *gpio_chip_get_fwnode(struct gpio_chip *chip) +{ + if (chip->fwnode) + return chip->fwnode; + else if (chip->parent) + return chip->parent->fwnode; + else + return NULL; +} + +static int ls2k_bmc_gpiochip_find(struct gpio_chip *gc, const void *data) +{ + struct acpi_device *adev; + struct list_head resource_list; + struct resource_entry *rentry; + struct fwnode_handle *fwnode = gpio_chip_get_fwnode(gc); + phys_addr_t start_addr = (phys_addr_t) data; + int ret, found = 0; + + if (!is_acpi_node(fwnode)) + goto out; + + adev = to_acpi_device_node(fwnode); + if (!adev) + goto out; + + INIT_LIST_HEAD(&resource_list); + + ret = acpi_dev_get_memory_resources(adev, &resource_list); + if (ret < 0) + goto out; + rentry = list_first_entry_or_null(&resource_list, struct resource_entry, node); + if (!rentry) + goto free_resource_list; + if (rentry->res->start == start_addr) + found = 1; + +free_resource_list: + acpi_dev_free_resource_list(&resource_list); +out: + return found; +} + +static struct gpio_desc *ls2k_bmc_find_gpio(struct ls2k_bmc_ddata *ddata) +{ + /* + * In conventional way, the GPIO should be obtained through ACPI or + * device tree. However, when the information is not available, + * we should find the GPIO according to the convention of the server + * boards with LS2K BMC, the gpio signal relelecting the reset event + * of the BMC should be connected to pin 14 of the GPIO input of + * the first CPU node. The address of that GPIO controller is fixed. + */ + static const phys_addr_t LOONGSON_GPIO_REG_BASE = 0x1FE00500; + static const unsigned int LS2K_BMC_RESET_GPIO = 14; + int ret; + struct gpio_device *gdev __free(gpio_device_put) = NULL; + struct gpio_chip *gc; + struct property_entry ls2k_bmc_swnode_properties[2] = { 0 }; + + dev_dbg(ddata->dev, "Searching for GPIO chip at address %pa\n", &LOONGSON_GPIO_REG_BASE); + + gdev = gpio_device_find((void *)LOONGSON_GPIO_REG_BASE, ls2k_bmc_gpiochip_find); + + if (!gdev) { + dev_dbg(ddata->dev, "cannot find GPIO chip at address %pa, deferring\n", + &LOONGSON_GPIO_REG_BASE); + return ERR_PTR(-EPROBE_DEFER); + } + + gc = gpio_device_get_chip(gdev); + + ls2k_bmc_swnode_properties[0] = PROPERTY_ENTRY_GPIO("gpio", + gpio_chip_get_fwnode(gc), LS2K_BMC_RESET_GPIO, GPIO_ACTIVE_HIGH); + + ret = device_create_managed_software_node(ddata->dev, ls2k_bmc_swnode_properties, NULL); + if (ret) { + dev_err(ddata->dev, "Failed to create software node for GPIO reset: %d\n", ret); + return ERR_PTR(ret); + } + + return devm_gpiod_get_index(ddata->dev, NULL, 0, GPIOD_IN); +} + static void ls2k_bmc_cancel_wq(void *data) { struct ls2k_bmc_ddata *ddata = data; @@ -384,8 +461,7 @@ static void ls2k_bmc_cancel_wq(void *data) static int ls2k_bmc_init(struct ls2k_bmc_ddata *ddata) { struct pci_dev *pdev = to_pci_dev(ddata->dev); - void __iomem *gpio_base; - int gpio_irq, ret, val; + int gpio_irq, ret; ls2k_bmc_save_pci_data(pdev, ddata); @@ -402,44 +478,32 @@ static int ls2k_bmc_init(struct ls2k_bmc_ddata *ddata) return ret; } - gpio_base = ioremap(LOONGSON_GPIO_REG_BASE, LOONGSON_GPIO_REG_SIZE); - if (!gpio_base) - return -ENOMEM; - - /* Disable GPIO output */ - val = readl(gpio_base + LOONGSON_GPIO_OEN); - writel(val | BIT(LS2K_BMC_RESET_GPIO), gpio_base + LOONGSON_GPIO_OEN); - - /* Enable GPIO functionality */ - val = readl(gpio_base + LOONGSON_GPIO_FUNC); - writel(val & ~BIT(LS2K_BMC_RESET_GPIO), gpio_base + LOONGSON_GPIO_FUNC); - - /* Set GPIO interrupts to low-level active */ - val = readl(gpio_base + LOONGSON_GPIO_INTPOL); - writel(val & ~BIT(LS2K_BMC_RESET_GPIO), gpio_base + LOONGSON_GPIO_INTPOL); - - /* Enable GPIO interrupts */ - val = readl(gpio_base + LOONGSON_GPIO_INTEN); - writel(val | BIT(LS2K_BMC_RESET_GPIO), gpio_base + LOONGSON_GPIO_INTEN); + ddata->reset_gpio = devm_gpiod_get_index_optional(&pdev->dev, NULL, 0, GPIOD_IN); + if (IS_ERR(ddata->reset_gpio)) { + ret = PTR_ERR(ddata->reset_gpio); + ddata->reset_gpio = NULL; + return dev_err_probe(ddata->dev, ret, "Failed to get GPIO pin for reset signal\n"); + } + if (ddata->reset_gpio == NULL) { + ddata->reset_gpio = ls2k_bmc_find_gpio(ddata); + if (IS_ERR(ddata->reset_gpio)) { + ret = PTR_ERR(ddata->reset_gpio); + ddata->reset_gpio = NULL; + return dev_err_probe(ddata->dev, ret, "Failed to find GPIO pin for reset signal\n"); + } + } - iounmap(gpio_base); + gpio_irq = gpiod_to_irq(ddata->reset_gpio); - /* - * Since gpio_chip->to_irq is not implemented in the Loongson-3 GPIO driver, - * acpi_register_gsi() is used to obtain the GPIO IRQ. The GPIO interrupt is a - * watchdog interrupt that is triggered when the BMC resets. - */ - gpio_irq = acpi_register_gsi(NULL, LS2K_BMC_RESET_GPIO_GSI, ACPI_EDGE_SENSITIVE, - ACPI_ACTIVE_LOW); if (gpio_irq < 0) - return gpio_irq; + return dev_err_probe(ddata->dev, gpio_irq, "Failed to get IRQ for GPIO reset signal input\n"); - ret = devm_request_irq(ddata->dev, gpio_irq, ls2k_bmc_interrupt, - IRQF_SHARED | IRQF_TRIGGER_FALLING, "ls2kbmc gpio", ddata); - if (ret) - dev_err(ddata->dev, "Failed to request LS2KBMC GPIO IRQ %d.\n", gpio_irq); + ret = devm_request_irq(&pdev->dev, gpio_irq, ls2k_bmc_interrupt, + IRQF_SHARED | IRQF_TRIGGER_FALLING, "ls2kbmc reset", ddata); + + if (ret != 0) + return dev_err_probe(ddata->dev, ret, "Failed to request IRQ %d for GPIO reset signal input.\n", gpio_irq); - acpi_unregister_gsi(LS2K_BMC_RESET_GPIO_GSI); return ret; } -- 2.49.0