From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01CAE39B970 for ; Fri, 10 Jul 2026 08:08:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783670904; cv=none; b=ha14XBAyvAHn0tcmdnL9hFQB7iu487Ka8W5CiEHJD8tbjh27qxbkFErzQBay6vS/n1gsl6NjtcIlWQNqCvlx4PhK/m8dUMhN6UhykX6f7EFlNLxkkCmOj+9vK5LcXPrnlTOf63rLToRvtirA6xtfDzl3cRNzTP3R803i7fWq5ZA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783670904; c=relaxed/simple; bh=vFQgRVurwUp6h2aW8Yh+mleS+jXhjZBKlZ6eg2S9Wyk=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=XdQlXZ59rI0tiYnvCv/zY/hMxtAZ9m8ECoPlbnNLiGYfgHSCQ/fRmx6NNtgMpxxfQyGrQ5J37XwuSY0/Texj+SHoxXrlnovQSW2peGyOpzUZx/uymsEEJvPIgZIcBebJ8ca1smGhpfywZrIaIkbiW/GWWUiY2/vhJsfXXl2VxOk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=F74lVtJn; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="F74lVtJn" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 89E831F000E9; Fri, 10 Jul 2026 08:08:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783670902; bh=yMRr1YnRufFQyRdhQsyWFfFy6KrEdPv4Kd5cbN2l9AM=; h=From:To:Cc:Subject:Date; b=F74lVtJn8yP11LSnX5DZVSgoTqViU/1Dd4PHw4l1+l25unBJUhQd/JbHzqhXS/O7A 59KdLma9Bxa2FguYjjfzLOvpZBJJF+feyyHv0AAztcW6th2S/5nYuse7FFoRpAofNq CvT3nvYvBQHOPh6HQMFrzDRhdn2t4E9/tHf1wqbl8xKh2666BC5QBi8WQCAe/yvjcb ON40hV3aFdw50HW1gYJ7BP9WH/YaBYZB2Kpa5cfLpVD7ulmr68C2n9RP8uPH5qkG84 isl9on0Tazw3X1VQsHcrqnOzeopF0RGVWgNW6lCJVDLXKFWQvELn0TlCKYQe9Y80+J 3Lq6w1simx6Mg== Received: from sofa.misterjones.org ([185.219.108.64] helo=lobster-girl.client.m3-hotspots.de) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wi6HU-00000003acG-0TOe; Fri, 10 Jul 2026 08:08:20 +0000 From: Marc Zyngier To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: John , Daniel Drake , Marek Szyprowski , Florian Fainelli , Daniel Lezcano , Thomas Gleixner , Mark Rutland Subject: [PATCH] clocksource/drivers/arm_arch_timer: Workaround bcm2712 broken EL2 virtual timer Date: Fri, 10 Jul 2026 09:09:58 +0100 Message-ID: <20260710080958.491620-1-maz@kernel.org> X-Mailer: git-send-email 2.47.3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, therealgraysky@proton.me, dan@reactivated.net, m.szyprowski@samsung.com, florian.fainelli@broadcom.com, daniel.lezcano@linaro.org, tglx@linutronix.de, mark.rutland@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false It appears that the bcm2712 SoC found in the relatively popular RPi5 has a broken EL2 virtual timer. We do not know the reason why the timer isn't working (the timer is ticking, but the interrupt never fires), and the SoC vendor doesn't communicate on the reason why this isn't working, leaving users and maintainers in the dark. Paper over the issue by detecting the broken HW, falling back to the physical timer instead, and let the user know about it. Also taint the kernel as the machine is definitely not compliant with the spec, and we don't know what else is wrong with it. Reported-by: John Reported-by: Daniel Drake Reported-by: Marek Szyprowski Signed-off-by: Marc Zyngier Cc: Florian Fainelli Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Mark Rutland --- drivers/clocksource/arm_arch_timer.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 4adf756423de9..7b4a98df6962b 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1090,6 +1090,27 @@ static int __init arch_timer_common_init(void) return arch_timer_arch_init(); } +static bool __init has_broken_el2_vtimer(void) +{ + /* + * SoCs described here have been found to be broken, though no + * explanation has been volunteered by the vendor. Let the user know + * we're papering over the vendor's lack of communication. + */ + static const char * const broken_el2_vtimer[] __initconst = { + "brcm,bcm2712", + NULL + }; + + if (of_machine_compatible_match(broken_el2_vtimer)) { + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); + pr_warn_once(HW_ERR "Known broken EL2 virtual timer, ignoring it\n"); + return true; + } + + return false; +} + /** * arch_timer_select_ppi() - Select suitable PPI for the current system. * @@ -1115,7 +1136,8 @@ static int __init arch_timer_common_init(void) static enum arch_timer_ppi_nr __init arch_timer_select_ppi(void) { if (is_kernel_in_hyp_mode()) { - if (arch_timer_ppi[ARCH_TIMER_HYP_VIRT_PPI]) + if (arch_timer_ppi[ARCH_TIMER_HYP_VIRT_PPI] && + !has_broken_el2_vtimer()) return ARCH_TIMER_HYP_VIRT_PPI; pr_warn_once(FW_BUG "VHE-capable CPU without EL2 virtual timer interrupt\n"); -- 2.47.3