From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7456228373 for ; Fri, 10 Jul 2026 18:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783708843; cv=none; b=hy6xCvcgl+JzeDAiDuSq0vX3lIk6V3V1dudP7owh3p8qE6Y7OUpAZgwH9BBLxIAAOPzreXJje4geG9xFQyncogTfu+Q6C95uBTRNn6gd4i/b5kLmUOuVioShUOxC3c7gg6HVivvraD6HcRrErilesliKtDM4vG6BVpAq+TyJz2g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783708843; c=relaxed/simple; bh=E0l7+kMNWQmATWMlRzv69azlDpKbWFAxKvJDytWmvGA=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YubeNNLjG88fM00of4og0G5DM3HerDa9z4ZBO7X4Pl78jzSU7QnQMm1Ng37OXXZe27R43b2gHlNgpOzBuZmUS/jhwCDCajeLVltTsTT2FZecwXHRE8bMKivyvEiofvlqrxXR47SOj9qaMMCDO0juaJ2JQJc7gY07OoU/bC6BEus= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=A74IRlRJ; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=awiYCfcf; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="A74IRlRJ"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="awiYCfcf" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66AIXYLZ1652592 for ; Fri, 10 Jul 2026 18:40:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= sIpvr9LYvApRcbIP0ivQOlJFsKZAMdUrM1YtqwpVgaE=; b=A74IRlRJnNjrcxXb UQ7z646iDwLE/mBnMm4EPorid6bO0fVIm2OHjSDMNKETLXoKYCe38K/ZK6pUj0nz Dfg+oBJbeeBd1oeJsg7ziEgISMfJelHuAqL0W0Yd3sJYH9BUv6cQjJANgmlOFR2D fh9FjNAi/cCk7VbwZXmFOxpCd+njt3Tj5RgMTKxGKh6bGHLlOLHoj8pg6GayFQ3S VlDht69mJxsOJLtbhIuDMyeVMCSqoEoobnLNHmhLg9RKCpyY1De8j0WNkKW0y3Gc 4OZfvDsrs2e9pLibkybRhVtyPwrWcBcYiw4ZLSgvu5mktlxYQucI+TFWx93zrNAD NMvoTw== Received: from mail-pg1-f198.google.com (mail-pg1-f198.google.com [209.85.215.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fb649r0tk-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 10 Jul 2026 18:40:41 +0000 (GMT) Received: by mail-pg1-f198.google.com with SMTP id 41be03b00d2f7-c856470fe9fso1114207a12.2 for ; Fri, 10 Jul 2026 11:40:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1783708840; x=1784313640; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:organization :references:in-reply-to:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to:content-type; bh=sIpvr9LYvApRcbIP0ivQOlJFsKZAMdUrM1YtqwpVgaE=; b=awiYCfcfLggFAp7z4k572qRkVc2FiWcmRVaAWG22Kf6kfbx2ifxqOn72yp0PQLQiCB zITtSRvze5DYb/mi6ahfzuoVwnLxJiUGSC6dNed4AKIkjdKrNbTNgXkVzPRbtECpfSws PWLAaP11ITwAcfhWWUqJ9j6TAAj58t9k383Zx7rLKkrGAcs/njDklbHC6PdcCRuECbXs giiU7QZA32VH/ISvyJP2YGVrEHQrAD1ur3ESEvZyaucI4QAaIAXmkXeh4WvNjMkG3Hi8 SqD+GhU64s0Y7QZ0ZCWkNiSJPpqYx5TiLdG+EbCw8LeQcvPOGp0SovEiEA9XVjdGOmtC B0yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783708840; x=1784313640; h=content-transfer-encoding:content-type:mime-version:organization :references:in-reply-to:message-id:subject:cc:to:from:date:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=sIpvr9LYvApRcbIP0ivQOlJFsKZAMdUrM1YtqwpVgaE=; b=O1xQV4A6XtRUA2/sJXJ0HVXmIlbDh/rQbl8yj/DyhPVpJL0D3xWaVCLp3sDBb9Xi0W H+D0uAP83fv/vGV8z9cHgI+z/knAG+z+3UqBSoP1p3b8d8K/Q/lj3+khSms7YQBs7Jjc MlxJCUyHyshfjumZubYFgIPp7SsI9wUi1/h27xby6VhINvl/PBxlZbuRAmTcj9I6k5u0 be/gO4w/7F2R2rrpNx5hEzndclIle9/XLQJrK+Fn403WJpnwZZF6DUNGYesTBXYqavj5 B06D5gR4k0qDIsh79KN3ItVqk5YYuEV3DlaaUZnsKF7eK17CTWQGt8ZOgLmbYtAiir/M v/TQ== X-Forwarded-Encrypted: i=1; AHgh+RqTPUANrIB8Q3z43CJHV0VCY+9BTyaEA8CqDtUcAcLZd7ILRMxh0UO9e1q2xAAgJqXd2bfgXMJuU5Kp+5k=@vger.kernel.org X-Gm-Message-State: AOJu0Yzi7HjbmVyNVpnUO1Xj6LdGD2t4YK/N3V+aBOXvVRfOSQlAoirf g1L/1fzqtMzXAOJVNWAG8H6NHyxN4T5Sj5m1qQ1/LvRCUqiWoWzWnQ6MpihYHMtnzET6Ar+wj+q aEV9MAyu6fp4iStJkqNpegu8H2flIY1gdh4ur6uX22QB+nN1Cz+2Ws4tYrFXyJVHtZNo= X-Gm-Gg: AfdE7clsvoQIaD4BAYo0BllMksbbW56qKE3/l4pv5lMvqEdKY32D0NBH3bLFYCvOwDk QFeu3uNcozTTxXyYzqIWkttCdHAazNZMgvn95bqxVRsx6v/499zP37Uadu/ZJs8Yis9f4j+0oCk phbd2fH4aJzQDIFefzaAkgCR0HS0+Ld+8jITiW6nIAGCd7pc4QnV0CWLW6Ttfda9UPat62zOEWq OhxlvPg2fXMUtmIS96Fy5xq0m8xTI+ytdtdB7WmgfWVWpHCa1FEZe0uX5eFnKnu+3ptHaDTK2sp v0GHgu4KcG7UetlFlUeXfmAjaGkVi5lyF8zqQNO/CDNAV2EkrBXHwh5/w2kHHrXc8hSl5Lf6eUs BIi7e1t89OZ7JfvB8wPZ1VPamKhZI4nHVCWDB X-Received: by 2002:a05:6a20:3d02:b0:3bf:e761:626a with SMTP id adf61e73a8af0-3c110a74637mr214304637.38.1783708839953; Fri, 10 Jul 2026 11:40:39 -0700 (PDT) X-Received: by 2002:a05:6a20:3d02:b0:3bf:e761:626a with SMTP id adf61e73a8af0-3c110a74637mr214261637.38.1783708839424; Fri, 10 Jul 2026 11:40:39 -0700 (PDT) Received: from localhost ([50.35.46.84]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31174ac14f2sm45594006eec.27.2026.07.10.11.40.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jul 2026 11:40:39 -0700 (PDT) Date: Fri, 10 Jul 2026 11:40:35 -0700 From: Jonathan Cameron To: Andre Przywara Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J . Wysocki" , Len Brown , James Morse , Ben Horgan , Reinette Chatre , Fenghua Yu , Jonathan Cameron , Srivathsa L Rao , Ganapatrao Kulkarni , Trilok Soni , Srinivas Ramana , Niyas Sait , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 04/16] arm_mpam: propagate MSC read errors for mpam_msc_read_mbwu_l() Message-ID: <20260710114035.00006b0b@oss.qualcomm.com> In-Reply-To: <20260710144520.917375-5-andre.przywara@arm.com> References: <20260710144520.917375-1-andre.przywara@arm.com> <20260710144520.917375-5-andre.przywara@arm.com> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: ewRY6d2Zyv_RhIA5pKHEDvB_It4vDQFW X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEwMDE4NyBTYWx0ZWRfXwBYY+jM+1I4t mcirWD2es23Ejjenm6PGUPM7yMmPnx8EGmHxw4Ss6w84Eeal9hsCabwp7N3ffrHKweiB3rqPKSl kE7etIdHvtgDeAZyOuHfbhzjztPL2a25z432rLtS9PV59n/VexwGXsEZPOPP6yzTI8yq5dwSPSe 5wzRnUpyXcmgqynAFt9KQWRB/yKrL/EyJJrMiVZqWZN7in2uJZ95oq3RbbKKdUWON5X7zwNiPw6 7QjT7KmJlbmkh9AVwICItp8cGTJO6WyQLefJeeSVnrS9Frao2JhO+Rd3iKBVRm/5qAcHPPhiVXZ ni0pxPVRs07TmKh93LNePKxCXLTuleE2IXQOfJ35TNPPHcB1nofDYDRZBUrr6s+SsYhtw1l+CPS CbbeJgaO74SmZ4q2Co0p/1y3VaSykDJQuPgl0BL8qrXiadAGk5uBCax/Ji97NdV9kFpyfaTfFrm dzY4MjUT3gHu8VaUfiQ== X-Proofpoint-GUID: ewRY6d2Zyv_RhIA5pKHEDvB_It4vDQFW X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEwMDE4NyBTYWx0ZWRfX+yMshLYZcRzu SO1OgCrs+0OE59e9XqW9YU92Lbv0w8gtRDsIFwmFbtbTO5l/FMn3KiwD1q3nOWMy287ESqJa1HG 7HhfZWONbALPdN2bto9XuUd7PmhyOgc= X-Authority-Analysis: v=2.4 cv=VZfH+lp9 c=1 sm=1 tr=0 ts=6a513ca9 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=qC1CW/w66vtJz1P9yTJxNA==:17 a=kj9zAlcOel0A:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=7CQSdrXTAAAA:8 a=fCQIp7EH0RKNOWKKMFAA:9 a=CjuIK1q_8ugA:10 a=x9snwWr2DeNwDh03kgHS:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-10_05,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 spamscore=0 suspectscore=0 bulkscore=0 impostorscore=0 phishscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607100187 On Fri, 10 Jul 2026 16:45:08 +0200 Andre Przywara wrote: > Allow the mpam_msc_read_mbwu_l() function to return an error, and > propagate read errors from the lower level up. > So far we were using a special value to indicate the "unstable read" > condition, replace that with the actual Linux error code, since it's now > easy to do. > > Signed-off-by: Andre Przywara > --- > drivers/resctrl/mpam_devices.c | 54 +++++++++++++++++++++++++--------- > 1 file changed, 40 insertions(+), 14 deletions(-) > > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index b1bd047da203..3b6f9e552a9f 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -1112,8 +1112,9 @@ static bool mpam_ris_has_mbwu_long_counter(struct mpam_msc_ris *ris) > mpam_has_feature(mpam_feat_msmon_mbwu_44counter, &ris->props)); > } > > -static u64 mpam_msc_read_mbwu_l(struct mpam_msc *msc) > +static int mpam_msc_read_mbwu_l(struct mpam_msc *msc, u64 *res) > { > + int ret; > int retry = 3; > u32 mbwu_l_low; > u32 mbwu_l_high1, mbwu_l_high2; > @@ -1123,20 +1124,30 @@ static u64 mpam_msc_read_mbwu_l(struct mpam_msc *msc) > WARN_ON_ONCE((MSMON_MBWU_L + sizeof(u64)) > msc->mapped_hwpage_sz); > WARN_ON_ONCE(!cpumask_test_cpu(smp_processor_id(), &msc->accessibility)); > > - __mpam_read_reg(msc, MSMON_MBWU_L + 4, &mbwu_l_high2); > + ret = __mpam_read_reg(msc, MSMON_MBWU_L + 4, &mbwu_l_high2); > + if (ret) > + return ret; > + > do { > mbwu_l_high1 = mbwu_l_high2; > - __mpam_read_reg(msc, MSMON_MBWU_L, &mbwu_l_low); > - __mpam_read_reg(msc, MSMON_MBWU_L + 4, &mbwu_l_high2); > + ret = __mpam_read_reg(msc, MSMON_MBWU_L, &mbwu_l_low); > + if (ret) > + return ret; > + ret = __mpam_read_reg(msc, MSMON_MBWU_L + 4, &mbwu_l_high2); > + if (ret) > + return ret; > > retry--; > } while (mbwu_l_high1 != mbwu_l_high2 && retry > 0); > > - if (mbwu_l_high1 == mbwu_l_high2) > - return ((u64)mbwu_l_high1 << 32) | mbwu_l_low; > + if (mbwu_l_high1 == mbwu_l_high2) { > + *res = ((u64)mbwu_l_high1 << 32) | mbwu_l_low; > + } else { > + pr_warn("Failed to read a stable value\n"); > + ret = -EBUSY; I guess this may get more complex in later patches, but for now why not just return -EBUSY. > + } > > - pr_warn("Failed to read a stable value\n"); > - return MSMON___L_NRDY; > + return ret; > } > > static void mpam_msc_zero_mbwu_l(struct mpam_msc *msc) > @@ -1283,6 +1294,7 @@ static u64 mpam_msmon_overflow_val(enum mpam_device_features type, > static void __ris_msmon_read(void *arg) > { > u64 now; > + int ret; > u32 now32; > bool nrdy = false; > bool config_mismatch; > @@ -1358,8 +1370,9 @@ static void __ris_msmon_read(void *arg) Relevant bit of context isn't show, but as before looks like ACQUIRE() and ACQUIRE_ERR() will make this simpler by just letting you do direct returns on all error paths though you will need to set m->err = ret in each one. To me that is simpler, but feel free to disagree. > case mpam_feat_msmon_mbwu_44counter: > case mpam_feat_msmon_mbwu_63counter: > if (m->type != mpam_feat_msmon_mbwu_31counter) { > - now = mpam_msc_read_mbwu_l(msc); > - nrdy = now & MSMON___L_NRDY; > + ret = mpam_msc_read_mbwu_l(msc, &now); > + if (ret) > + goto out_unlock; > > if (m->type == mpam_feat_msmon_mbwu_63counter) > now = FIELD_GET(MSMON___LWD_VALUE, now); > @@ -1397,10 +1410,15 @@ static void __ris_msmon_read(void *arg) > if (nrdy) > m->err = -EBUSY; > > - if (m->err) > - return; > + if (!m->err) Above ACQUIRE() suggestion relies on it not being a problem to hold the lock a little longer and incorporate these sets in m. I haven't checked closely but I think that's fine. > + *m->val += now; > + > + return; > + > +out_unlock: > + mpam_mon_sel_unlock(msc); > > - *m->val += now; > + m->err = ret; > } > > static int _msmon_read(struct mpam_component *comp, struct mon_read *arg) > @@ -1747,6 +1765,7 @@ static int mpam_save_mbwu_state(void *arg) > { > int i; > u64 val; > + int ret = 0; > struct mon_cfg *cfg; > u32 cur_flt, cur_ctl, mon_sel; > struct mpam_msc_ris *ris = arg; > @@ -1768,7 +1787,9 @@ static int mpam_save_mbwu_state(void *arg) > mpam_write_monsel_reg(msc, CFG_MBWU_CTL, 0); > > if (mpam_ris_has_mbwu_long_counter(ris)) { > - val = mpam_msc_read_mbwu_l(msc); > + ret = mpam_msc_read_mbwu_l(msc, &val); > + if (ret) > + goto out_unlock; > mpam_msc_zero_mbwu_l(msc); > } else { > u32 val32; > @@ -1788,6 +1809,11 @@ static int mpam_save_mbwu_state(void *arg) > } > > return 0; > + > +out_unlock: > + mpam_mon_sel_unlock(msc); ACQUIRE() would avoid need for this handling so I think this is another good place to look at using it. > + > + return ret; > } > > /*