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Fri, 10 Jul 2026 12:02:44 -0700 (PDT) X-Received: by 2002:a05:6a20:9f8c:b0:3c0:9c19:659c with SMTP id adf61e73a8af0-3c110b7ba39mr273287637.68.1783710163656; Fri, 10 Jul 2026 12:02:43 -0700 (PDT) Received: from localhost ([50.35.46.84]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13b659d8da9sm78063641c88.14.2026.07.10.12.02.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jul 2026 12:02:43 -0700 (PDT) Date: Fri, 10 Jul 2026 12:02:39 -0700 From: Jonathan Cameron To: Andre Przywara Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J . Wysocki" , Len Brown , James Morse , Ben Horgan , Reinette Chatre , Fenghua Yu , Jonathan Cameron , Srivathsa L Rao , Ganapatrao Kulkarni , Trilok Soni , Srinivas Ramana , Niyas Sait , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 09/16] arm_mpam: let low level MSC write accessors return an error Message-ID: <20260710120239.00002f99@oss.qualcomm.com> In-Reply-To: <20260710144520.917375-10-andre.przywara@arm.com> References: <20260710144520.917375-1-andre.przywara@arm.com> <20260710144520.917375-10-andre.przywara@arm.com> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: zxotcobTTpG3uNalBwCSNBfMKYsCJl55 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEwMDE5MCBTYWx0ZWRfXzZPpaAfNUVCv hSkzW4E/ur2aCXc6KnZX3V0NpHpXhn6q+q1zdiBTvWkj7AEXzIPdPiATa8XrprYFWQF239oHRZr tVVxG/2m/AtgQIOqxPcpHcW/8FRE72IGRtK883GsuFS+ae2FGTSQ9FTAUS4OnUeFm7oWgpRZZ2s xvEOZNFpn7FMzvbt58L2Pa8uDpePrIte4IiywZcYdB5q099ffRhOeVLyIKgW1BwzZhzvAfbzsg6 2D2ndmUOSPGwc5WvHeMw4nx32yZzEHo6JGmkm49rN4j7iuKL858QG4S59ux6XSDFMf/wlYZxpga ICBZhMU+LBgVEw8AKns0QpRI4pBgKP7T6Q3lRxVI+QJORiBKI0m7+JYCf6EIvHGBwDjtJ/vwbf+ Lu7R2b1UFMiUs3sLYd7rHFekH9WGRVjmaGn9KmTCNgZTIwz8WuBH6YvPEvnEkwlW/eMKIV0VyYk UWb8Jp8RTeA4WJSVdNg== X-Authority-Analysis: v=2.4 cv=JIYLdcKb c=1 sm=1 tr=0 ts=6a5141d5 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=qC1CW/w66vtJz1P9yTJxNA==:17 a=kj9zAlcOel0A:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=7CQSdrXTAAAA:8 a=LvQbmhgH5lkxUdBqBIQA:9 a=CjuIK1q_8ugA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-GUID: zxotcobTTpG3uNalBwCSNBfMKYsCJl55 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEwMDE5MCBTYWx0ZWRfX7kDWmSPhBWPE t5VQcrZMFvKK5/aVYeO10FJf0NRFNnwuNYA7LAmdzufpSBp0r9TCU0LbBCSNH0pj7L/aXSCi24o p1OFinB1OMvlF/Nyi/RrDswZ7he4ytE= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-10_05,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 spamscore=0 suspectscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607100190 On Fri, 10 Jul 2026 16:45:13 +0200 Andre Przywara wrote: > The upcoming MPAM-Fb support does not use MMIO primitives to access an > MSC, but employs a shared-memory/doorbell based firmware protocol. > Its complexity means that is must be able to handle errors, whereas we > always assume an MSC access succeeds today. > > Change the __mpam_write_reg() low level accessor function to return an > error code. At the moment this is always 0, but this will change with > alternative MSC access methods. > > Also change some low level wrappers to propagate the error. > > Signed-off-by: Andre Przywara I mentioned earlier that to me a split of read vs write into different series of patches is making things more complex than they might be. They are same 'sort' of change so I'd do them together. Then a reviewer can quickly see if all new sources of error are covered. Thanks (and sorry I didn't look at v2!) Jonathan > --- > drivers/resctrl/mpam_devices.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index b2ecaba29fcc..f1e40ce24f5a 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -195,18 +195,20 @@ static inline int _mpam_read_partsel_reg(struct mpam_msc *msc, u16 reg, > > #define mpam_read_partsel_reg(msc, reg, res) _mpam_read_partsel_reg(msc, MPAMF_##reg, res) > > -static void __mpam_write_reg(struct mpam_msc *msc, u16 reg, u32 val) > +static int __mpam_write_reg(struct mpam_msc *msc, u16 reg, u32 val) > { > WARN_ON_ONCE(reg + sizeof(u32) > msc->mapped_hwpage_sz); > WARN_ON_ONCE(!cpumask_test_cpu(smp_processor_id(), &msc->accessibility)); > > writel_relaxed(val, msc->mapped_hwpage + reg); > + > + return 0; > } > > -static inline void _mpam_write_partsel_reg(struct mpam_msc *msc, u16 reg, u32 val) > +static inline int _mpam_write_partsel_reg(struct mpam_msc *msc, u16 reg, u32 val) > { > lockdep_assert_held_once(&msc->part_sel_lock); > - __mpam_write_reg(msc, reg, val); > + return __mpam_write_reg(msc, reg, val); > } > > #define mpam_write_partsel_reg(msc, reg, val) _mpam_write_partsel_reg(msc, MPAMCFG_##reg, val) > @@ -220,10 +222,10 @@ static inline int _mpam_read_monsel_reg(struct mpam_msc *msc, u16 reg, > > #define mpam_read_monsel_reg(msc, reg, res) _mpam_read_monsel_reg(msc, MSMON_##reg, res) > > -static inline void _mpam_write_monsel_reg(struct mpam_msc *msc, u16 reg, u32 val) > +static inline int _mpam_write_monsel_reg(struct mpam_msc *msc, u16 reg, u32 val) > { > mpam_mon_sel_lock_held(msc); > - __mpam_write_reg(msc, reg, val); > + return __mpam_write_reg(msc, reg, val); > } > > #define mpam_write_monsel_reg(msc, reg, val) _mpam_write_monsel_reg(msc, MSMON_##reg, val)