From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-m16.yeah.net (mail-m16.yeah.net [1.95.21.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E36E282F12 for ; Tue, 14 Jul 2026 05:57:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=1.95.21.15 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784008676; cv=none; b=Vpvafo7eLirnDTPArF1lLsizbmSRpyrx+rBSwceAFT0hkJBLraW9dsf7JFsQbf2Z+MN39PvShwiaZ0zwGn6AauVG3CeR9no0hZ8Y1Pp8ZjY8FUf/eKaMUKGe9J/v0gIXvOqa/0EQzbCgHaUHKPWFfxKpOa+O5vE8vfpjNTcaGU8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784008676; c=relaxed/simple; bh=9Idt39AqHqekGw0PvOOea3gIlMt/EYw3unnFDzakAX8=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=lYqx3XI2L2sx4Wyu1Pc5Ae9dmPZQohFLQNtS0u/I5PcACXUMZFeZpnAVvkGnSwSOKeFapDItmQdglEJfoTAt1u6ldsrPo1hVfdBwrxka4VW3wRXteaSgMw+d95oF5GqcIKdCMIor+zz1w7OsHjq93Zbg70MeFfwRy3+/5xLuxpQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=yeah.net; spf=pass smtp.mailfrom=yeah.net; dkim=pass (1024-bit key) header.d=yeah.net header.i=@yeah.net header.b=eRTYrCri; arc=none smtp.client-ip=1.95.21.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=yeah.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=yeah.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=yeah.net header.i=@yeah.net header.b="eRTYrCri" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yeah.net; s=s110527; h=From:To:Subject:Date:Message-ID:MIME-Version; bh=Xr ox76JQdZg1pjvn1Bf/QyORDmnkxBXNgRAd7uWih3M=; b=eRTYrCriA4gz0JDNSs 7VyLrHMv7SyOpnRJuH5p7stN+5XF66OuVDuQc5v63NLo8/V9kXmiBYJ1dvLPR6TL lcp7WMXrvzmxxD4Plf8CZfjotzXNDdgW5Ds12wEjgo/0zuKKcd8Qffd49bw/qUYp CAecHVEBbf/Q769pisJMzE/Ak= Received: from deepin (unknown []) by gzsmtp3 (Coremail) with UTF8SMTPSA id M88vCgD3H1tzzFVq0XVSBA--.10420S4; Tue, 14 Jul 2026 13:43:39 +0800 (CST) From: Ziran Zhang To: Will Deacon , Peter Zijlstra , Boqun Feng , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" Cc: Mark Rutland , Gary Guo , linux-kernel@vger.kernel.org, Ziran Zhang Subject: [PATCH] x86/atomic: Add arch_atomic_not() Date: Tue, 14 Jul 2026 13:42:18 +0800 Message-ID: <20260714054219.39382-1-zhangcoder@yeah.net> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:M88vCgD3H1tzzFVq0XVSBA--.10420S4 X-Coremail-Antispam: 1Uf129KBjvdXoWrZF45ZryfJr45WF4rXFykuFg_yoWkAFc_u3 WfJws5CryFvrW09a1UGa1FyFy5trsaqFy5Wwn3tw13AF1kKayUCa1kJr1xAr10krs5ArW5 uF10vrWFywnFgjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: x2kd0wpfrgv2o61htxgoqh3/1tbiIgtFBmpVzItyYAAA3A The kernel already has non-atomic bitmap_complement(), but no direct atomic implementation. According to Intel and AMD manuals, the NOT instruction supports a LOCK prefix. Currently the only way to achieve this is arch_atomic_xor(-1, v), which is non-obvious and hurts readability, so add arch_atomic_not() to provide an explicit atomic complement operation. Signed-off-by: Ziran Zhang --- arch/x86/include/asm/atomic.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h index 75743f1df..d7e543194 100644 --- a/arch/x86/include/asm/atomic.h +++ b/arch/x86/include/asm/atomic.h @@ -168,6 +168,13 @@ static __always_inline int arch_atomic_fetch_xor(int i, atomic_t *v) } #define arch_atomic_fetch_xor arch_atomic_fetch_xor +static __always_inline void arch_atomic_not(atomic_t *v) +{ + asm_inline volatile(LOCK_PREFIX "notl %0" + : "+m" (v->counter) :: "memory"); +} +#define arch_atomic_not arch_atomic_not + #ifdef CONFIG_X86_32 # include #else -- 2.51.0