From: Christoph Hellwig <hch@lst.de>
To: Bart Van Assche <bvanassche@acm.org>
Cc: Jun Zeng <jun1.zeng@intel.com>,
kbusch@kernel.org, axboe@kernel.dk, hch@lst.de, sagi@grimberg.me,
linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org,
andriy.shevchenko@intel.com, gang.cao@intel.com,
jun.i.jin@intel.com, yong.hu@intel.com
Subject: Re: [PATCH v1 0/1] nvme-pci: adaptive interrupt coalescing
Date: Mon, 20 Jul 2026 16:59:27 +0200 [thread overview]
Message-ID: <20260720145927.GA17986@lst.de> (raw)
In-Reply-To: <3c29b8cb-906c-4c48-89cf-59c676900616@acm.org>
On Fri, Jul 17, 2026 at 10:06:24AM -0700, Bart Van Assche wrote:
>> Monitor the IOPS and average queue depth of inflight IO periodically
>> on each NVMe drive and enable/disable interrupt coalescing
>> automatically without user intervention. This feature is enabled by
>> default and can be disabled/enabled through debugfs during runtime.
>
> An algorithm like the above can be implemented more efficiently in NVMe
> controller hardware than in software, isn't it?
There is a lot of discussion on interrupt coalescing in the NVMe
technical working group right now. I would suggest everyone working
for a member company (and that should be everyone one the cc list
here) to check that out before rushing anything.
prev parent reply other threads:[~2026-07-20 14:59 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 7:57 [PATCH v1 0/1] nvme-pci: adaptive interrupt coalescing Jun Zeng
2026-07-15 7:57 ` [PATCH v1 1/1] " Jun Zeng
2026-07-16 20:52 ` Keith Busch
2026-07-17 1:10 ` Zeng, Jun1
2026-07-17 8:06 ` Shevchenko, Andriy
2026-07-20 15:05 ` Christoph Hellwig
2026-07-20 15:25 ` Keith Busch
2026-07-21 8:37 ` Fengnan Chang
2026-07-21 10:07 ` Andy Shevchenko
2026-07-21 15:11 ` Keith Busch
2026-07-22 2:22 ` changfengnan
2026-07-17 17:06 ` [PATCH v1 0/1] " Bart Van Assche
2026-07-20 5:24 ` Zeng, Jun1
2026-07-20 14:53 ` Keith Busch
2026-07-20 14:59 ` Christoph Hellwig [this message]
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