Re: [PATCH net-next] net: stmmac: dwxgmac2: configure INTM for per-channel interrupt routing

[Jakub Kicinski <kuba@kernel.org>]

On Thu, 23 Jul 2026 15:50:50 +0200 Maxime Chevallier wrote:
> On 7/23/26 15:24, Zxyan Zhu wrote:
> > The XGMAC DMA_MODE register has an INTM field (bits 13:12) that
> > controls interrupt routing behavior for DMA transfer completion
> > events:
> > 
> >   00 (default): sbd_perch_* are pulse signals, sbd_intr_o is also
> >                 asserted for each completion event.
> >   01:          sbd_perch_* are level signals, sbd_intr_o is NOT
> >                 asserted for packet transfer completion events.
> > 
> > When multi-MSI is enabled (dma_cfg->multi_msi_en), per-channel TX/RX
> > interrupts are expected to arrive on their dedicated lines
> > (sbd_perch_tx_intr_o / sbd_perch_rx_intr_o).  In the default INTM=00
> > mode, sbd_intr_o also fires for DMA completion events, but the
> > multi-MSI handler stmmac_mac_interrupt() only processes MAC-layer
> > events (LPI, PMT, timestamps) and does not service DMA channels,
> > silently dropping the interrupt.
> > 
> > Set INTM to mode 1 when multi-MSI is enabled, following the same
> > pattern as the GMAC4 DMA_BUS_MODE_INTM configuration in commit
> > 6ccf12ae111e ("net: stmmac: use interrupt mode INTM=1 for multi-MSI").
> > 
> > Signed-off-by: Zxyan Zhu <zxyan0222@gmail.com>  
> 
> Same logic as in dwmac4, this looks good to me,

Is this a fix tho? The commit message reads like DMA irqs are
completely ignored. But neither this commit nor 6ccf12ae111e
really explain much to an outsider..