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From: Peter Zijlstra <peterz@infradead.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, ada.coupriediaz@arm.com,
	ardb@kernel.org, catalin.marinas@arm.com, hca@linux.ibm.com,
	linux-kernel@vger.kernel.org, maz@kernel.org,
	ruanjinjie@huawei.com, vladimir.murzin@arm.com, will@kernel.org,
	yang@os.amperecomputing.com
Subject: Re: [RFC PATCH 06/13] arm64: percpu: Add infrastructure for preemptible this_cpu_*() ops
Date: Tue, 28 Jul 2026 18:46:31 +0200	[thread overview]
Message-ID: <20260728164631.GJ651302@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <amjQkPyNAsFRJF9I@J2N7QTR9R3>

On Tue, Jul 28, 2026 at 04:53:52PM +0100, Mark Rutland wrote:

> I was being lazy here relative to what we do for asm-extable.h. How
> about I match the pattern there, and have:
> 
> | #define PCPU_GPR_PCP_SHIFT              0
> | #define PCPU_GPR_PCP                    GENMASK(4, 0)
> | #define PCPU_GPR_OFF_SHIFT              5
> | #define PCPU_GPR_OFF                    GENMASK(9, 5)
> | #define PCPU_GPR_ADDR_SHIFT             10
> | #define PCPU_GPR_ADDR                   GENMASK(14, 10)
> | 
> | #define __VAL_PCPU_GPRS(pcp, off, addr)                                                 \
> |         "("                                                                             \
> |                 "(.L__gpr_num_" pcp  " << " __stringify(PCPU_GPR_PCP_SHIFT) ") | "      \
> |                 "(.L__gpr_num_" off  " << " __stringify(PCPU_GPR_OFF_SHIFT) ") | "      \
> |                 "(.L__gpr_num_" addr " << " __stringify(PCPU_GPR_ADDR_SHIFT) ")"       \
> |         ")"
> 
> ... if that's any better?

#define PCPU_GPR_BITS			5
#define __PCPU_GPR_MASK(_shift)		GENMASK((_shift+PCPU_GPR_BITS-1), _shift)

#define PCPU_GPR_PCP_SHIFT              (0*PCPU_GPR_BITS)
#define PCPU_GPR_OFF_SHIFT              (1*PCPU_GPR_BITS)
#define PCPU_GPR_ADDR_SHIFT             (2*PCPU_GPR_BITS)

#define PCPU_GPR_PCP 			__PCPU_GPR_MASK(PCPU_GPR_PCP_SHIFT)
#define PCPU_GPR_OFF 			__PCPU_GPR_MASK(PCPU_GPR_OFF_SHIFT)
#define PCPU_GPR_ADDR 			__PCPU_GPR_MASK(PCPU_GPR_ADDR_SHIFT)

?

  reply	other threads:[~2026-07-28 16:46 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-28 12:38 [RFC PATCH 00/13] arm64: Preemptible this_cpu_*() operations Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 01/13] arm64: preempt: Simplify and optimize __preempt_count_dec_and_test() Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 02/13] arm64: preempt: Treat should_resched() as unlikely Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 03/13] arm64: ptrace: Always inline pt_regs_[read,write}_reg() Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 04/13] arm64: percpu: Factor out percpu offset asm Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 05/13] arm64: gpr-num: Add wxN aliases for wN registers Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 06/13] arm64: percpu: Add infrastructure for preemptible this_cpu_*() ops Mark Rutland
2026-07-28 14:19   ` Peter Zijlstra
2026-07-28 14:30     ` Peter Zijlstra
2026-07-28 16:03       ` Mark Rutland
2026-07-28 16:49         ` Peter Zijlstra
2026-07-28 15:53     ` Mark Rutland
2026-07-28 16:46       ` Peter Zijlstra [this message]
2026-07-28 16:49       ` Peter Zijlstra
2026-07-28 16:51   ` Heiko Carstens
2026-07-28 12:38 ` [RFC PATCH 07/13] arm64: percpu: Implement preemptible read/write ops Mark Rutland
2026-07-28 21:47   ` David Laight
2026-07-28 22:05   ` David Laight
2026-07-28 12:38 ` [RFC PATCH 08/13] arm64: percpu: Implement preemptible void RMW ops Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 09/13] arm64: percpu: Implement preemptible return " Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 10/13] arm64: percpu: Implement preemptible XCHG ops Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 11/13] arm64: percpu: Implement preemptible CMPXCHG ops Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 12/13] arm64: percpu: Implement preemptible CMPXCHG128 ops Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 13/13] arm64: percpu: Remove _pcp_protect*() wrappers Mark Rutland

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