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From: Rik van Riel <riel@surriel.com>
To: Thomas Gleixner <tglx@kernel.org>
Cc: Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	linux-kernel@vger.kernel.org, Nikunj A Dadhania <nikunj@amd.com>,
	Babu Moger <babu.moger@amd.com>,
	kernel-team@meta.com
Subject: [PATCH] x86/cpufeatures: make clearcpuid=invlpgb work
Date: Wed, 29 Jul 2026 13:06:46 -0400	[thread overview]
Message-ID: <20260729130646.304ad69d@fangorn> (raw)

With the recently found INVLPGB / TLBSYNC issue, there has
been some interest in disabling invlpgb TLB flushing, in
order to rule out that issue wihle tracking down some
userspace crash.

The top search result shows "clearcpuid=invlpgb"

However, invlpgb is not actually in x86_cap_flags, so booting
with clearcpuid=invlpgb results in the following message:

  clearcpuid: unknown CPU flag: invlpgb

Adding "invlpgb" to the comment after X86_FEATURE_INVLPGB
causes mkcapflags.sh to pick up invlpgb, and add it to
x86_cap_flags.

With that change, clearcpuid=invlpgb works:

  clearcpuid: force-disabling CPU feature flag: invlpgb

Signed-off-by: Rik van Riel <riel@surriel.com>
---
 arch/x86/include/asm/cpufeatures.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 1b4a48bff18f..62fa2b0236af 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -332,7 +332,7 @@
 #define X86_FEATURE_CLZERO		(13*32+ 0) /* "clzero" CLZERO instruction */
 #define X86_FEATURE_IRPERF		(13*32+ 1) /* "irperf" Instructions Retired Count */
 #define X86_FEATURE_XSAVEERPTR		(13*32+ 2) /* "xsaveerptr" Always save/restore FP error pointers */
-#define X86_FEATURE_INVLPGB		(13*32+ 3) /* INVLPGB and TLBSYNC instructions supported */
+#define X86_FEATURE_INVLPGB		(13*32+ 3) /* "invplgb" INVLPGB and TLBSYNC instructions supported */
 #define X86_FEATURE_RDPRU		(13*32+ 4) /* "rdpru" Read processor register at user level */
 #define X86_FEATURE_WBNOINVD		(13*32+ 9) /* "wbnoinvd" WBNOINVD instruction */
 #define X86_FEATURE_AMD_IBPB		(13*32+12) /* Indirect Branch Prediction Barrier */
-- 
2.54.0



             reply	other threads:[~2026-07-29 17:08 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-29 17:06 Rik van Riel [this message]
2026-07-29 18:33 ` [PATCH] x86/cpufeatures: make clearcpuid=invlpgb work Borislav Petkov

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