From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from casper.infradead.org (casper.infradead.org [90.155.50.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A7473264CB for ; Thu, 30 Jul 2026 10:32:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.50.34 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785407558; cv=none; b=ZmId52fkQdnXz9sgPRTrj3KeyS4iNCyN8QuijwoYRvn1Z8eUuXYYyeqVeQgtNGTuXTzM4AGn/8zVMMpbq+rNb6xEibr9x3HkTRzBRynlctfjWrf9koeEDgvA5BPSFSvTS78HNNvDfN8edV4WGGa1iT3QM/I+urFKHBZeeX1EyHI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785407558; c=relaxed/simple; bh=no4V/+nfSTwia+9hLoASUlb1Eazusn0OG6MZIy8qzfs=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=QWb3240wxXT5XqE+Y4s1gcqtmKJz0iXYA3hEBAxDe+/oR1ltS04R/KCLgusznVP/J2V9PWSLK7ND+xlMIdS+zIZ9jj6cxdjOfLHCYdmONuliawCfXqgd+erj7H46R3EDzvKRStqJ0sL9YpkcjqC6dydkoV1s/3tD4JN75hVoSMY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=pass smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=TUAS+spc; arc=none smtp.client-ip=90.155.50.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="TUAS+spc" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=5aN22P7UkqHptlBNWocRlYgoDswQON0DKGwXid+RsV0=; b=TUAS+spcle65hoPa4Fj4c7I+UM t7nYIHmnGRVUTptvN98ZC0xgl7Urh4nSqX2z61HsmkWfRH6MS3LwQsJmPRnYn+10oHcwUP4kzRuRS 9+SIUJmOf1AgJTcdjCzCSrd1vK9SlkjNPafObRBS8/ajfdeCHvstcub0Qt5SyDHCA41wwbd3OEYCY wB9wIRscZCCs7q2VuNYd/afGqhfVnnA/f1+GHGrnYlAt55MILL6IFr4llZ/hYSBi2hjbmMBjghZ2m rww5h5XGV7/Um4ucdvP7rMWPY01tSG0E45g1hdZDBxLtCX+1X7ybv48imx+Z1PGFO7H3SYt3iTWNW mq/m7bNw==; Received: from 77-249-17-252.cable.dynamic.v4.ziggo.nl ([77.249.17.252] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wpO3w-0000000BhIS-1fTM; Thu, 30 Jul 2026 10:32:28 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id C19D930095A; Thu, 30 Jul 2026 12:32:27 +0200 (CEST) Date: Thu, 30 Jul 2026 12:32:27 +0200 From: Peter Zijlstra To: Borislav Petkov Cc: Rik van Riel , Dave Hansen , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , x86@kernel.org, linux-kernel@vger.kernel.org, kernel-team@meta.com Subject: Re: [PATCH] add tlbi=off to disable INVLPGB Message-ID: <20260730103227.GC751831@noisy.programming.kicks-ass.net> References: <20260729204341.3eb0b5ea@fangorn> <20260730014412.GEamqsbL46iteL25as@fat_crate.local> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260730014412.GEamqsbL46iteL25as@fat_crate.local> On Wed, Jul 29, 2026 at 06:44:12PM -0700, Borislav Petkov wrote: > On Wed, Jul 29, 2026 at 08:43:41PM -0400, Rik van Riel wrote: > > With the recently found INVLPGB / TLBSYNC issue, there has been some > > interest in disabling invlpgb TLB flushing, in order to rule out > > that CPU issue as a cause of userspace crashes. > > > > The top search result shows "clearcpuid=invlpgb" > > > > However, invlpgb is not actually in x86_cap_flags, so booting with > > clearcpuid=invlpgb results in an error message: > > > > clearcpuid: unknown CPU flag: invlpgb > > > > Add a kernel commandline option to turn off AMD TLBI, to make it > > easier to rule out INVLPGB as a cause of userspace crashes. > > > > Verified by booting a Bergamo system with tlbi=off and checking > > that the INVLPGB bit is clear in boot_cpu_data.x86_capability > > > > Signed-off-by: Rik van Riel > > Suggested-by: Borislav Petkov > > --- > > arch/x86/mm/init_64.c | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > I'll take that and raise you with v2: > > The rationale for moving it to amd.c is that it won't be there on builds which > don't enable AMD code. And we could still raise it up somewhere > vendor-agnostic later if the other vendor wants to be able to disable their > version if TLB invalidation glue implementation. > > From: Rik van Riel > Date: Wed, 29 Jul 2026 20:43:41 -0400 > Subject: [PATCH] x86/CPU/AMD: Add a tlbi= cmdline switch > > With the recently found INVLPGB / TLBSYNC issue, there has been some > interest in disabling INVLPGB-based TLB flushing, in order to rule out > that CPU issue as a cause of userspace crashes. > > Add a kernel command line option to control AMD TLBI. > > [ bp: Rewrite commit message, move to amd.c, add documentation. ] > > Suggested-by: Borislav Petkov > Signed-off-by: Rik van Riel > Signed-off-by: Borislav Petkov (AMD) > Link: https://patch.msgid.link/20260729204341.3eb0b5ea@fangorn > --- > Documentation/admin-guide/kernel-parameters.txt | 5 +++++ > arch/x86/kernel/cpu/amd.c | 10 ++++++++++ > 2 files changed, 15 insertions(+) > > diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt > index 87bb1fb31696..4e3c5fa411d2 100644 > --- a/Documentation/admin-guide/kernel-parameters.txt > +++ b/Documentation/admin-guide/kernel-parameters.txt > @@ -7568,6 +7568,11 @@ Kernel parameters > See Documentation/admin-guide/mm/transhuge.rst for more > details. > > + tlbi= [X86-64] > + Format: {off} > + Control the AMD TLBI feature support (INVLPGB-based > + TLB flushing). > + > topology= [S390,EARLY] > Format: {off | on} > Specify if the kernel should make use of the cpu > diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c > index 54e14ed276b5..a3cde941a81d 100644 > --- a/arch/x86/kernel/cpu/amd.c > +++ b/arch/x86/kernel/cpu/amd.c > @@ -1440,3 +1440,13 @@ static __init int print_dmi_agesa(void) > return 0; > } > late_initcall(print_dmi_agesa); > + > +/* Control TLBI feature (INVLPGB-based TLB flushing) */ > +static int __init tlbi_setup(char *str) > +{ > + if (!strcmp(str, "off")) > + setup_clear_cpu_cap(X86_FEATURE_INVLPGB); > + > + return 1; > +} > +__setup("tlbi=", tlbi_setup); TLBI stands for Translation Lookaside Buffer Invalidation. So a command line that says: 'tlbi=off' means no move invalidation *at*all*. This seems like a very bad option. Please rename.