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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Vinod Koul , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue , Lad Prabhakar , Romain Gantois , Heiner Kallweit , Coia Prant Cc: Neil Armstrong , Russell King , Shawn Lin , David Heidelberg , netdev@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-renesas-soc@vger.kernel.org Subject: [PATCH v2 00/10] net-next: add basic support for RK3568 XPCS Date: Sat, 1 Aug 2026 22:22:24 +0800 Message-ID: <20260801142244.679437-2-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Changes since v1: Patch 2 (dt-bindings: phy: naneng-combphy) - Changed `rockchip,sgmii-mac-sel` default from 0 to 1 to match hardware reset value (GMAC1) - Added `if-then` conditional in `allOf` to restrict the property to `rockchip,rk3568-naneng-combphy` only - Updated commit message to reflect hardware default Patch 3 (phy: rockchip: naneng-combphy) - Changed `priv->sgmii_mac_sel` initial value from 0 to 1 to match hardware default - Updated commit message to align with binding changes Patch 4 (dt-bindings: net: pcs: rockchip-dwxpcs) - Fixed `reg` format in example to pass `dt_binding_check` - Added missing `#include ` in example Patch 5 (arm64: dts: rockchip: rk3568) - Clarified commit message: "all nodes disabled" refers to XPCS device nodes, not fixed-clock nodes - Noted that `assigned-clock-parents` are applied at board level (Patch 9), not in SoC dtsi Patch 6 (net: pcs: xpcs: add ANRESTART support for SGMII link recovery) - Split the original RFC patch into two: the SGMII state reading fix was sent separately to the net tree and has been merged. This patch now only adds the ANRESTART functionality as a new feature for net-next. - Removed unintentional `BMCR_ANRESTART` change in c37_1000basex (this was not tested and should not have been included) - Kept SGMII path changes for RK3568 only Patch 7 (net: pcs: xpcs: add Rockchip RK3568 platform glue driver) - Added `.remove` callback with `pm_runtime_force_suspend()` to fix potential CSR clock leak on device removal - Added compatible string validation in `xpcs_rk_create()` before dereferencing drvdata (using `of_match_node(xpcs_rk_of_ids, pcs_np)`) - Removed `__maybe_unused` from PM runtime callbacks - Add `depends on PM` in Kconfig to ensure `CONFIG_PM` is enabled for this driver Patch 8 (net: stmmac: dwmac-rk) - Moved `gmac_clk_enable()` call before SGMII check to ensure clocks are enabled before register access in SGMII mode - Added unified error handling (`clk_disable` label) for all failure paths - Added error handling for default (unhandled interface) case === This series adds proper SGMII support for the Rockchip RK3568 SoC using the integrated Synopsys DesignWare XPCS, along with necessary fixes and refactoring in the stmmac core and XPCS driver. Motivation ========== The RK3568 integrates a DW XPCS accessed via APB3 and connected to a Naneng Combo SerDes PHY. Several boards (e.g., Ariaboard Photonicat) use this interface for Gigabit Ethernet. However, the current upstream stmmac driver does not support this configuration, and the XPCS driver has issues in SGMII poll mode that cause the link to be reported incorrectly. This series addresses these issues by: - Fixing the XPCS driver's SGMII AN state handling - Refactoring stmmac PCS lifetime management to allow platform drivers full control over PCS creation/destruction - Adding a Rockchip XPCS platform glue driver and wiring it up in dwmac-rk Series overview =============== Generic: Patch 1: move XPCS lifetime management to platform drivers (introduces pcs_init/pcs_exit callbacks) PHY: Patch 2: DT binding for Naneng Combo PHY SGMII MAC selection Patch 3: implement the PHY SGMII MAC selection in driver RK3568 XPCS/SGMII: Patch 4: DT binding for Rockchip RK3568 XPCS Patch 5: add XPCS and fixed-clock nodes to rk3568.dtsi Patch 6: add ANRESTART support for SGMII link recovery Patch 7: implement the Rockchip XPCS platform glue driver Patch 8: wire up SGMII support in dwmac-rk Patch 10: update MAINTAINERS Board enablement: Patch 9: enable SGMII LAN port on Photonicat board Key design decisions ==================== - The stmmac core now delegates XPCS creation entirely to platform drivers via pcs_init/pcs_exit. This is necessary because the generic XPCS creation logic would override any XPCS set up by the platform driver. - The Rockchip XPCS driver creates a virtual MDIO bus over the APB3 registers and implements address remapping. The generic XPCS core handles all PCS configuration via phylink_pcs_ops. - On RK3568 in SGMII mode, the MAC clock is fixed at 125 MHz and cannot be dynamically changed. In-band mode is used, and the generic stmmac set_clk_tx_rate callback is disabled to prevent incorrect clock updates that would break RX. - The SerDes and power domain are attached to the XPCS device tree node rather than the MAC node. This reflects the actual hardware topology and simplifies the dwmac-rk driver by keeping all PCS-related resources self-contained. It also prepares for possible future QSGMII support, where a single SerDes serves multiple MACs and would be more naturally managed under the XPCS node. Testing ======= Board: Ariaboard Photonicat (RK3568) OS: Armbian (trixie) Kernel: 6.18 (backports) Result: The SGMII interface obtains an IP address, SSH works, and ping traffic passes without loss. Notes ===== - When testing out-band mode with set_clk_tx_rate, only 1000Mbps works on both TX/RX; 10/100Mbps only works on TX side. Dependencies ============ None. All patches apply cleanly on top of torvalds master tree (v7.2). Acknowledgments =============== This work was inspired by and builds upon the excellent work of others: - Serge Semin's Synopsys DesignWare XPCS platform driver (pcs-xpcs-plat.c) - Clément Léger's Renesas MIIC driver (pcs-rzn1-miic.c) - The Rockchip TRM and downstream OEM drivers Thanks in advance, Coia Prant --- Coia Prant (10): net: stmmac: move XPCS lifetime management to platform drivers dt-bindings: phy: rockchip: naneng-combphy: add rockchip,sgmii-mac-sel property phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 dt-bindings: net: pcs: add rockchip,rk3568-xpcs binding arm64: dts: rockchip: rk3568: add XPCS and fixed-clock nodes net: pcs: xpcs: add ANRESTART support for SGMII link recovery net: pcs: xpcs: add Rockchip RK3568 platform glue driver net: stmmac: dwmac-rk: add SGMII support for RK3568 arm64: dts: rockchip: rk3568-photonicat: enable SGMII LAN port MAINTAINERS: add entry for Rockchip XPCS driver .../bindings/net/pcs/rockchip-dwxpcs.yaml | 127 +++++ .../phy/phy-rockchip-naneng-combphy.yaml | 13 + MAINTAINERS | 9 + .../boot/dts/rockchip/rk3568-photonicat.dts | 77 ++- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 45 ++ drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 44 +- .../stmicro/stmmac/dwmac-renesas-gbeth.c | 7 +- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 121 +++- .../net/ethernet/stmicro/stmmac/dwmac-rzn1.c | 7 +- .../ethernet/stmicro/stmmac/dwmac-socfpga.c | 7 +- .../net/ethernet/stmicro/stmmac/stmmac_mdio.c | 37 +- drivers/net/pcs/Kconfig | 23 + drivers/net/pcs/Makefile | 7 +- drivers/net/pcs/pcs-xpcs-rk.c | 538 ++++++++++++++++++ drivers/net/pcs/pcs-xpcs.c | 17 +- .../rockchip/phy-rockchip-naneng-combphy.c | 8 + include/linux/pcs/pcs-xpcs-rk.h | 11 + 18 files changed, 1030 insertions(+), 69 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/pcs/rockchip-dwxpcs.yaml create mode 100644 drivers/net/pcs/pcs-xpcs-rk.c create mode 100644 include/linux/pcs/pcs-xpcs-rk.h -- 2.47.3